built-in self test - Dissertation

About 96 item dissertation in line with built-in self test query results,the following is 1 to 50(Search took 0.046 seconds)

Research on On-line Detecting Methods of Faults Reside in Digital Circuits,WangJiYe/Harbin Institute of Technology,0/28
Research and Implementation of SoC Embedded Flash Built-in Self Test Method,LiuYuBo/University of Electronic Science and Technology,0/5
Application of Folding Counters in SoC Test,LiZuo/Hefei University of Technology,0/6
Simulation and Verification Research Based on MT-6000 System Level,HuShaoFei/Changsha University of Science and Technology,0/6
Research on Low Cost Test Method for RTL Data Path under Power Constraints,TianBin/Hunan University,0/3
Study on Multi-object Optimization for Weighted Built-in Self-test Design,ZhanZuo/Guilin University of Electronic Science and Technology,0/18
SRAM BIST Circuit Design Based on the March C-Algorithm,WuDi/Beijing Jiaotong University,0/85
The Research on Test and Fault Diagnosis Methods in Analogue and Mixed-signal Circuits,ZhuYanQing/Hunan University,3/732
Testable Design and Testing for the OR-Coincidence Logic System,PanZhangZuo/Zhejiang University,0/180
The Research on Low Power Built-in Self-test Design,LiRui/Southeast University,4/590
The Research on Low Power Built-in Self-test Design,LiJie/Southeast University,2/527
Boolean Process and Waveform Simulator,LiLiJian/Institute of Computing Technology,0/71
Research on the Design Optimization Techniques for System-On-Chip Testing,ZhangHong/Xi'an University of Electronic Science and Technology,7/744
Study on Built-In Self-Test Methodology for Fault Diagnosis of Mixed-Signal Circuits,SunXiuBin/University of Electronic Science and Technology,3/807
Research on Design for Testability Based on the Framework of SOC,XuLei/Tsinghua University,5/772
Path Delay Fault Testing for Arithmetic Circuits,YangDeCai/University of Electronic Science and Technology,1/189
Built - in self- test technology integrated circuit low-power,WangYi/Guizhou University,0/263
Research on Built-off Self-Test for System-on-a-Chip,ZhanWenFa/Hefei University of Technology,3/152
Research on Low Power Test Technology and Temperature Aware Test Scheduling for System-on-Chip,CaoBei/Harbin Institute of Technology,0/78
Research on Low Cost Deterministic Built-in Self Test (BIST),ZhouBin/Harbin Institute of Technology,0/127
Research of a BIST Scheme Using Test Patterns Applied by Circuit-under-Test Itself,OuYangXiong/Hunan University,2/101
The Researches on Mixed-Signal Test and Design for Testability,PangWeiQu/Hunan University,2/266
The Research and Simulation of Embedded RAM Testing,SongYi/Hunan University,3/108
High-performance microprocessor cache (CACHE) back-end design,WuYue/Shanghai Jiaotong University,0/193
Study of Embedded Memory DFT Based on BIST,XuJinRong/Beijing Jiaotong University,7/274
Full Custom Design and Realization of Static Random Access Memory IP Core,LiuZuo/National University of Defense Science and Technology,3/146
Research on Circuit Fault Diagnosis and Low-Power Test,QiuHang/Nanjing University of Aeronautics and Astronautics,2/307
Digital circuit test generation platform for research and application of design for testability,DengYuDan/Nanjing University of Aeronautics and Astronautics,1/397
Research on Technology of Design for Testability and Application,XieMingEn/Nanjing University of Aeronautics and Astronautics,3/740
Research and Implementation of Low-power Test Structure Based on Segment Transformation,YangZuo/Hunan University,0/28
Core-test Methodology and Application in SOC Design,MengQing/Zhejiang University,12/459
Optimize the design of embedded SRAM,WangLei/University of Electronic Science and Technology,6/243
Computer hardware circuit design for testability and automatic test to achieve,CaiJian/Northwestern Polytechnical University,3/401
Research and Implementation of embedded microprocessor design for testability,GaoShuJing/Qingdao University,3/208
The Design for Testability and the Circuit of DSPC50,ZhuXiaoLi/Hunan University,4/107
Research on Digital Filter for Oversampling D/A Converter,LiuTao/Hefei University of Technology,5/524
Study of Embedded Memory DFT Algorithm Based on BIST,YaoJun/Harbin Engineering University,7/282
The Study on Built-in Self-test (BIST) for Integrated Circuits Based-on Multiple Scan Chains,LiuJun/Hefei University of Technology,1/246
A Research about System-On-Chip’s(SOC) Design for Test,ChenYeRong/Jilin University,0/235
Mbist Diagnosis Algorithm and Self-Repair,RenAiLing/Southeast University,6/228
\,MaoKe/Northwestern Polytechnical University,0/116
Design and Realization of SATA Build In Self Test,MaJunCheng/Xi'an University of Electronic Science and Technology,2/202
The DFT and Test Generation of Garfield,JinZhiGang/Southeast University,1/128
A Study on Memory Built-in Self-Test and Functional Core Testing,FanZhiXiang/Southeast University,2/194
The Research on BIST Technology and a BIST Scheme for Mixed-signal Circuit,TangYuLan/Jiangnan University,1/160
BIST-Based Delay-Fault Testing of FPGA Device,LiuBaoYang/Harbin Engineering University,1/279
Research and Full Custom Design of High Performance Arithmetic and Logical Unit,SunYan/National University of Defense Science and Technology,6/210
Research and Implementation of Design-For-Test and On-Chip-Debug of Embedded Processor,YanMing/National University of Defense Science and Technology,0/186
Research on VLSI Low Power BIST Based on Folding Counter,HuZhiGuo/Hefei University of Technology,1/88
Research on DFT Methodology Based on STN LCD Driver and Controller,HuXiaoYu/Huazhong University of Science and Technology,3/178