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Study of Key Technology of Development and Industrialization for High Speed and High Precision Mounter

Author: YuanPeng
Tutor: HuYueMing
School: South China University of Technology
Course: Control Theory and Control Engineering
Keywords: surface mounting technology mounter point pattern Scatter Search Feeder assignment
CLC: TN405
Type: PhD thesis
Year: 2005
Downloads: 87
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Abstract


Surface mounting technology is an important index to evaluate the manufacturing level of Electronics Industry. Automatic mounter is the key device of the SMT assembly line. This kind of equipment long-term depends on import and in domestic there has no report on successful nationalized development and market sale. The author continuously devotes to the research of the core technology for three years and recently has successfully completed the development with Zhaoqing New Baohua Ltd., and the machine has pushed to the market.This dissertation lucubrates the core technology of the high speed and high precision automatic mounter and gains the following several contributions.1. After thoroughly analyzing the performance demands of the system and using the overseas advanced design experience as reference; the dissertation discusses the mounter’s whole hardware design proposal. First, it introduces the mounter’s I/O control system based on PC104 structure; Next, it analysis the performance demand of the two key axises XY and presents the solve method and the performance which can be achieved in practice; Finally, it compares the image grab method between line CCD and frame CCD in grab speed, image resolution and image size. The results show that grab with line CCD is faster and more cost-efficient than frame CCD.2. Aimed at the research of high speed and high reliability image location algorithm, the dissertation introduces an improved watershed algorithm, which combined the watershed transfer and edge detect methods with threshold segment and basin consolidation methods. The improved algorithm has better effect in segment and restraining the background noise than traditional watershed algorithm.3. The dissertation discusses the limitation of existing pattern match algorithms and proposes point pattern match algorithm to solve the image location problem with high-density pins IC such as QFP and BGA. Considering the IC’s pins are symmetrical, the dissertation presents a fast point pattern match algorithm that is more efficient than general point pattern algorithm and greatly reduces the calculation steps. By evaluating with IPC-9850 QFP100 Verification Panel, the results show that the algorithm has meets the requirements of robust, repeatability and accuracy with IC image location application. 4. From the point of optimization assembly time, this dissertation analysis the problem of minimizing the PCB assembly time for multi-head mounter with IPC-9050 1608C Verification Panel as an example. Aimed at the placement sequence problem with the feeder has assigned, it proposes a new optimization algorithm based on scatter search (SS) algorithm for the first time. First, it introduces the method of how to generate a starting set of solution vectors to guarantee a critical level of diversity which can increase the possibility to get the best solution in the whole field; Next, it discusses the improvement method for the evaluation solutions; And then it proposes the create, combine and avoiding duplications method of reference set; Finally, it evaluates the algorithm with 38 evaluation boards and the results show that the SS algorithm can increase the performance up to 14%～25% compare with Genetic Algorithm and the performance improves as the number of components increases.5. Aimed at the feeder assignment problem, this dissertation throws a detailed analysis and points out that the "one-to-one mapping" between component type and feeder is too strong restraint condition to meet the actual production demands. In view of the characteristics of the mounter we made, the dissertation proposes a new algorithm. The algorithm introduces an improved method with "one-to-many mapping" between component type and feeder, and then presents an assembly time optimization algorithm based on hybrid optimization strategy. The algorithm optimizes the feeder assignment and placement route with hierarchical simplification method.By evaluating with IPC-9850 1608C Verification Panel and comparing with Biological Immune Algorithm (BIA), the results show that the algorithm has reached the same level with the same kind of import machine and has better performance than BIA. The algorithm has well optimization result and short calculating time. It’s suitable to solve the large-scale or super large-scale optimization assembly problem and has a stronger versatility.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Manufacturing process
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