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Research and Implementation of Network-on-Chip in Heterogenous Multi-Processor System-on-Chip

Author: HeJing
Tutor: DuGaoMing
School: Hefei University of Technology
Course: Circuits and Systems
Keywords: Network-on-Chip Heterogeneous MPSoC Packet-Connected Circuit Routing Algorithm Network Performance
Type: Master's thesis
Year: 2013
Downloads: 1
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Network on chip (NoC) has been widely used in Heterogeneous Multi-processor system on chip (MPSoC) as the main communication infrastructure,which can not only guarantee service, but also ensure high throughput, low latencycommunication. This thesis studies routing algorithms and switching technique inNoC, especially in Packet-Connected Circuit (PCC) NoC. The main works are asfollows:1. The basic router structure of PCC has been designed. PCC is suitable formass data transmission between heterogeneous multi-cores, so the routing protocolfor PCC has been studied, as well as its transmitting characteristics and efficiency.According to the protocols, the basic structure of a PCC router has been designed,and the basic modules has also been defined. The whole router has been designedin Register Transfer Level (RTL) and simulation has been performed to provefunction correct.2. Different routing algorithms of PCC have been analyzed. Establishing thelink of PCC is one of the key effects that affect the whole performance, which isgreatly determined by the routing algorithms. Three kinds of routing algorithmshave been analyzed: XY routing algorithm, Turn routing algorithm and Retrograde-Turn routing algorithm. Experiment results demonstrate that, compared with theXY routing algorithm, the Retrograde-Turn routing algorithm can improve theaverage throughput and the average latency respectively by32.99%and24.21%.3. The PCC protocols have been optimized. Since that PCC has low efficiencywhen transferring short packets, three optimized schemes have been proposed:speculatively transmitting for short packets, fixed transmitting for short packetsand by the other configuration NoC. Special efforts have been put for the firstscheme by designing the detailed architecture in RTL, and detailed experimentshave been carried to test its performance. Eexperiment results show that the firstscheme makes average throughput increase3.4times and makes average latencycut in half to other two schemes when transferring short packets.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > LSI,ultra LSI
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