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Research of Detection Moving Objects System Based on FPGA

Author: JiangYu
Tutor: TanKeJun
School: Dalian Maritime University
Course: Electronic Science and Technology
Keywords: FPGA Movement target detection Median filtering Frame difference
CLC: TP391.41
Type: Master's thesis
Year: 2012
Downloads: 139
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Detection moving objects is one of the most important contents in digital image processing and computer vision and is also widely used in intelligent video surveillance system. The test result directly influences subsequent goal orientation, identification and tracking. So it has important significance to realize a steady and fast moving object detection system.The design is the theme of moving target detection system based on FPGA. The camera captures video of binary image of the motion object which display on the CRT screen. Compared with other embedded processor, FPGA do not only have high parallel processing ability and but also can be flexible and convenient to modify the design. This paper carefully studied advantages and disadvantages of moving object detection algorithm. Frame difference algorithm is selected to realize the motion target detection. The algorithm is simulated by matlab. This algorithm is simple and suitable for realizing real-time processing system on the hardware. The whole design includes six function modules:MT9P001initialization module, image acquisition module, image conversion module, multi-port SDRAM control module, VGA interface control module and video processing module which contains video pretreatment module, moving object detecting module and morphological processing module. This paper introduces the working principle of each function module and shows the simulation waveform.This paper speaks the moving target detection background and development The scheme design, chip selection, code design aspects of detailed video monitoring tracking system introduced the design process. All code is written with Verilog HDL. The whole system collect video image with MT9P001optical sensors. I2C bus configurates sensor internal registers. The sensor output the Bayer format data. The system transforms Bayer into color RGB format data through the linear compensation method. And then multi-port SDRAM controller caches the frame image. The RGB color data is conversed into gray image. The gray image is eliminated noise through median filter module. And then the SRAM stores one frame image. The same position pixel of adjacent two frames minus operation. The outing datas compare with the threshold T. Getting the binary images through morphology processing display on the CRT screen.

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Computer applications > Information processing (information processing) > Pattern Recognition and devices > Image recognition device
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