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Design of Multi-Channel Digital Receiver

Author: HuoJianXun
Tutor: ZhangQingXiang
School: Harbin Institute of Technology
Course: Information and Communication Engineering
Keywords: Digital receiver signal integrity digital down-conversion
CLC: TN851
Type: Master's thesis
Year: 2011
Downloads: 57
Quote: 0
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Abstract


Software radar, which is evolved from the software defined radio, has become the guiding ideology of the radar receiver design. The idea of SDR is that the radar receiver system is realized in software reconfigurable and scalable, based on the common hardware platform. Meanwhile, to meet real-time radar processing requirements, the radar receiver generally has a very strong signal processing and data transmission capacity.This paper focuses on the design of multi-channel digital receiver, which has the ability of processing eight analog channels.The receiver system, which is based on the research of mature products and using a typical funnel structure, is a parallel multi-processor system of FPGA+DSP. With the functional requirement, the paper put forward the thereunder of selecting critical chips, expatiates the design procedure of each functional module exhaustively in the circuit of the receiver.In this paper, the multi-channel receiver schematic is given. In the system, TS201 processor interconnects with Virtex-6 FPGA through the shared bus interface and Linkports. The system has 128MB capacity of SDRAM memories and high-speed communication interface, such as Ethernet, optical fiber communication.Based on the design of schematic, the paper has completed the setting of stack, placement of components and routing in high-speed PCB design. Using Cadence’s signal integrity tools to perform critical signal integrity simulation and constraint rules generation, this guides high-speed PCB layout.This paper also describes 16-channel digital down-conversion algorithms logic design inside Virtex-6 FPGA. Afterwards, the scheme design of 8-channel digital down-conversion based on time division multiplexing is given. The paper describes the mixer module, CIC extraction module, CFIR and PFIR filter module design in detail. And each module and whole system functional simulation and timing simulation is realized with Modelsim. The correctness of the system is verified by processing data with Matlab on frequency domain analysis, compared with ideal simulation results.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Radio equipment,telecommunications equipment > Receiver equipment, radio Radio > Receiver: the form of points
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