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Hardware Architecture Design for1080P of H.264Intra Chroma Prediction

Author: ZhangYan
Tutor: WangMingJiang
School: Harbin Institute of Technology
Course: Microelectronics and Solid State Electronics
Keywords: H.264 Intra Chroma Prediction Hardware Implementation 1080P
CLC: TN919.81
Type: Master's thesis
Year: 2012
Downloads: 5
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Abstract


As one of the hot area of research of the video codec, H.264’s performance isbetter than the previous video codec standard. H.264’s efficient performance in avariety of applications is welcomed, such as satellite TV, video storage, wirelessmultimedia transmission. The codec has gradually become the object of manyuniversities and corporate research. it is difficult to meet the high-definition ofreal-time encoding requirements because of its high coding complexity and largeamount of computation. Intra prediction is important to the H.264video encoder, thevideo image space, depending on the value of the pixels around the macro blockreconstruction to predict the current block, the residual transmission or storage, toachieve compression purpose. Therefore, the intra prediction plays an important rolein video compression efficiency.The thesis focuses on the algorithm of H.264Intra chroma prediction, includingthe DC prediction mode, the horizontal prediction mode, the vertical prediction mode,and the Plane prediction mode, and according to the four predictive algorithms putforward concrete scheme of hardware implementation, analysis of the chromaprediction control module and prediction and reconstruction process of storagemanagement problem. For the H.264code paths are very long, this paper integratedthe prediction, transform and other major functional modules, the sequence encodingprocess is divided into four pipeline architecture for multiple MB process, and thusplay to improve hardware utilization and throughput purpose. In the swap area andspeed the design principle premise, the main design of the chrominance intra8×8prediction mode in architecture and algorithms for modeling, using module reusedesign method, which reduces the chip area, lower costs, improve marketcompetitiveness.In this thesis, the design uses Verilog HDL language to implement the algorithmof chroma prediction and using ISE tools to simulate, using Design Compiler tosynthesize. Chartered0.13um technology library, it conducts the correspondingexperiment. The results of the experiment verify the effectiveness and have certainreference and practical significance.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Communicate > Image communication, multimedia communication > Image coding
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