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Design of Current Controller for Switched Reluctance Motor Based on CPLD

Author: LiangXinLe
Tutor: BianDunXin
School: Shandong University of Technology
Course: Power Electronics and Power Drives
Keywords: Switched Reluctance Drive System Phase current Limit frequency Current controller CPLD
CLC: TM352
Type: Master's thesis
Year: 2009
Downloads: 47
Quote: 0
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Abstract


Switched Reluctance Drive System (Switched Reluctance Drive, SRD) was developed in the 1980s, a new AC drive system, with its flexible control, simple structure, high reliability, excellent performance and other advantages of speed, display a broad application prospects. The main control parameters SRD opening angle, turn-off angle, phase current and phase winding voltages. However, the most important influence SRD operating characteristics, the most direct factor is the phase current waveform, the peak current and peak position. Control phase current waveform optimization it is the core of the SRD system. In this paper, the phase current SRD system as the research object, in summary, analysis of the existing current control method is proposed based on a new current control method - limit frequency current chopping control methods. SR motor based linear model is derived limit frequency current control mode current, chopping cycle, current analytical parameters such as pulse and analyze these parameters with the speed, position angle and the variation of the inductor. In Matlab / Simulink Central Plains and some 6/4 pole SRD model based on the establishment of a new SRD simulation model, the limit frequency current control methods for simulation, emulation parameters for different current waveforms were analyzed and summarized , and with the timing of the shutdown current chopping control methods were compared. The results show that current chopping frequency limit of the SR motor speed control method is easy to implement when the chopping frequency limit, to avoid excessive risk chopping frequency; stability, current ripple is small, can effectively reduce the switching losses and improve system SRD speed performance. Analog devices and CPLD using a combination of program design and implementation of the current controller. Analog circuit to complete phase current sampling and comparison with the reference current, CPLD is the core of the current controller, responsible for the completion limit frequency current control algorithm, the output signal to drive the chopper power converter. Finally, the current controller for a testing laboratory to verify the correctness of the design. This design of CPLD-based current controller, fast response, real-time, with fast and accurate tracking ability and high control accuracy. Compared with pure digital current controller, low cost, sampling delay is reduced, to achieve easier, does not require a very complex mathematical operations, consumes less CPLD logic unit.

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CLC: > Industrial Technology > Electrotechnical > Motor > A special motor > Reluctance motor
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