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Wire "Lay Down" Phenomena Study in Wire Bonding Process

Author: LuZuo
Tutor: MaoLingFeng
School: Suzhou University
Course: IC Engineering
Keywords: Semiconductor Flash Memory MCP Wire Bonding Long Wire Bonding Wire“Lay Down”Phenomena
CLC: TN405
Type: Master's thesis
Year: 2009
Downloads: 75
Quote: 1
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Abstract


Currently more chips are stacked into one MCP assembly for the flash memory fabrication. Regarding the requirement to stack more chips, low and long wire looping is needed in the wire bonding process. And with the application of long looping in the production, wire“lay down”problem occurs and further impacts product reliability and even causes reject. In this study, a series of evaluation & experiment were carried out on looping behavior and the wire bouncing phenomena. The causes of wire“lay down”were given as well as the solutions. With the results of this study, the process capability of long wire bonding is enhanced. The information and knowledge obtained will be good reference for new device/package development.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Manufacturing process
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