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The Research and Realization on Asymmetric Sine Inverter with Adjustable Frequency and Amplitude

Author: ZhouQingZhong
Tutor: ZuoHongQi
School: Harbin Institute of Technology
Course: Power Electronics and Power Drives
Keywords: asymmetric sinusoidal waveform zero voltage zero current switching HPWM distortion with zero passage
CLC: TM464
Type: Master's thesis
Year: 2008
Downloads: 104
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Abstract

The technique of Micro-plasma oxidation has several merits: high efficiency and little pollution, it has promotion patent and broad applied foreground. To meet the need of the research of Micro-plasma oxidation an asymmetric sinusoidal inverter is needed to be developed, it amplitudes between the positive period and the negative are different, its dead-time of zero passage is adjustable, and its amplitude and frequency can be regulated continuously in some range. The two-stage topology is adopted in asymmetric sinusoidal inverter, the backing stage is a high voltage DC power; the latter is an asymmetric sinusoidal inverter. Considering the loss and efficiency of the inverter system, the backing stage of asymmetric sinusoidal inverter adopts FB-ZVZCS converter topology. With the help of transformer leakage and filtering inductor, ZVS of leading-leg switches is realized in wide range of load. The voltage of blocking capacitor is added to leakage of transformer and the primary current is reset, and then ZCS of lagging-leg switches is realized in whole range of load. By analyzing modes of converter, we could know that maximum duty cycle is restricted. The slope compensation circuit is designed, to stabilize the output of the backing stage part and extend the duty cycle range.For the latter stage of asymmetric sinusoidal inverter with adjustable dead-time of zero passage, the main circuit of inverter adopts full bridge topology and HPWM. UC3637 is selected as core chip to control the circuit, and other functional circuits are designed such as: the reference generator of asymmetric sinusoidal waveform, the circuit of precision rectifier circuit, and the circuit of peak detector. According to the analysis of Fourier’s series to asymmetric sinusoidal waveform with adjustable dead-time of zero passage, the filter link is designed.On the base of the experiments of the inverter, causes are studied which result in the distortion of zero passage composed of simulation. The causes are uplift of modulation waveform、dead-time and inductor continuous flow , and the measures are presented. The experiment shows measures work, and help to restrain the distortion of zero passage. In order to validate the exactness of the analysis and theory, on the base of simulation, a small power experimental inverter has been designed and debugged, The experimental results indicate that this inverter meet all design targets well.

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