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Design of SiGe BiCMOS LNA for Wireless Receiver Front-end in 2.4GHz ISM Band

Author: ZhouJin
Tutor: LaiZongSheng
School: East China Normal University
Course: Microelectronics and Solid State Electronics
Keywords: Wireless receiver SiGe BiCMOS LNA RF
CLC: TN851
Type: Master's thesis
Year: 2010
Downloads: 127
Quote: 0
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Abstract


The dominating silicon technology in microelectronics are constrained its wide applications due to low carrier mobility and saturated drift velocity, what’s worse the indirect energy band transition structure. Compared to standard CMOS technology, SiGe BiCMOS technology wins at providing high performance in a low noise, large power dissipation amplifying circuits and being more facilitated in integration.SiGe BiCMOS combines the advantages of Bipolar and CMOS technology that meets the requirements of low power RF system. The key parts in SiGe BiCMOS technology are the HBT devices. As the width of emitter ever declining, and the highest cut off frequency keeps rising, which accommodates more freedom to optimising the performance of other devices. In terms of applying smaller feature size, it enables to drop power dissipation while the highest cut off frequency being constant. Meanwhile, fmax, noise figure, break-down property are also optimizing parameters.This work first analyses the process how SiGe HBT technology influenced over devices parameters, then introduces CE and CB transistor noise theory. Based on IBM SiGe BiCMOS technology, followed by accomplished the design of RF low noise amplifier front-end, relative simulations, verifications after layouts drawn in the Cadence. Characteristic achievements arrived are concluded as follows:1. This paper have studied the characteristics and market application prospect of SiGe HBT technology and designed front-end for wireless receiver in 2.4GHz frequency band (ISM).2. A simplified 2.4GHz emitter inductor negative feedback in cascaded structure was proposed, providing high linearity via capacitor feedback, with I/O matching network implemented by passive LC resonant circuit. Under the power supply being 2.5V, simulation results achieved noise figure less then 2.4dB, gain at 16dB, and better than-16dBm at 1dB point of compression. The simulation illustrated that this design structure fulfilled the design specifications and could be applied to receiver front-end with 2.4GHz frequency band for wireless communications.3. The chip is designed with 0.18μm IBM SiGe BiCMOS 7WL library and tested on the platform based on Cascode Microtech S300. The results shows that the power gain reaches 12.58dB at peak frequency while input and output matching are below-15dB and-10dB respectively. Moreover, the measured noise figure is less than 3dB and 1dB compression point is better than-15dBm. Most of the data are coincide with the post-simulated results.

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