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Research of Digital Halftoning Algorithm for AM-OLED Image

Author: ChenRuoYu
Tutor: YinSheng
School: Huazhong University of Science and Technology
Course: Software Engineering
Keywords: bayer dithering floating pixel halftoning OLED FPGA
CLC: TP391.41
Type: Master's thesis
Year: 2011
Downloads: 34
Quote: 0
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Abstract


OLED display is now widely researched as a next generation display technology, because of self-light emitting, fast response, full-solid state and other features. Many issues need to be enhanced, including luminescence materials, pixel unit design, production processing. Life of OLED display is not long, color display inaccurate, drive chips can not match with each other. These problems will influence image effect of OLED display. In this paper, based on 7 inches microcrystalline silicon thin film transistor OLED, we try to improve display output image distortion which caused by drive chips cannot match.Static Bayer ordered dithering cannot avoid blocky effect in the dithered images. In this paper, we improve Bayer ordered dithering matrix template to avoid that problem in the dithered images. The floating pixel is controlled by horizontal synchronous signal. The coming horizontal synchronous signal will change position of the floating pixel in the dithering matrix. The templates compared with every contiguous flame are different. Through multiple frame images, we can eliminate image distortion and blocky effect meanwhile, reserve many image detail. MATLAB’s verification shows that compared with static Bayer ordered dithering and dynamic Bayer dithering with floating pixel, PSNR of the picture can be advanced from 19.417 to 28.867, and SSIM of the picture can be advanced from 0.917 to 0.992.Otherwise, dynamic Bayer dithering algorithm with floating pixel is based on processing 2 bit pixel. It can be extended easily to process more dithering image data, and have a wide range of applications.We have made a control circuit for OLED display, which is based on FPGA. Dynamic Bayer dithering algorithm with floating pixel was described, simulated and synthesized with Verilog HDL in the data processing module in this control program. ModelSim verification shows that this algorithm can achieve a function with data compensation. Output signal observation shows that to display data and control signal are correct. It can achieve dynamic display of the OLED display.

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Computer applications > Information processing (information processing) > Pattern Recognition and devices > Image recognition device
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