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Research and Development of Low-voltage ZnO Thin-film Transistors

Author: HuYu
Tutor: WanQing
School: Hunan University
Course: Condensed Matter Physics
Keywords: thin film transistors ZnO Low-voltage room temperature mesoporous SiO2 gate dielectric electric double layers (EDLs) capacitance radio-frequency magnetron sputtering
CLC: TN321.5
Type: Master's thesis
Year: 2010
Downloads: 149
Quote: 1
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Abstract

Thin Film Tmnsisitors(TFTs), which is a key to the high-resolution display, have been significantly applied in the plat display field. TFTs with ZnO channels have attracted much attention over last several years, not only because of their high field-effect mobilities, low processing temperature, highly transparence in region of visible light and good compatibility with substrate, but also partly on account of nontoxic Zn-based minerals enriched on earth and potentially lower cost. It provides an attractive alternative to Si-based or organic TFTs for the development of commercially viable TFTs technologies.The reported large operation voltages are often required for ZnO-based TFTs operation because commonly used SiO2 gate dielectrics provide weak capacitive coupling between the gate electrode and the semiconductor channel. And it not accords with current of energy conservation. Our target is to fabricate practical and low power TFT combining with. the existed equipments. In this article, we have reported a low-voltage ZnO-TFTs operating at 2.0 V, which fabricated at room temperature. ZnO TFTs were prepared on normal glass substrates. ZnO-TFTs consist of four parts:a 200nm Sn-doped In2O3(ITO)layer as bottom-gate, a 5μm SiO2 layer grown at room temperature as gate dielectric, a 50nm ZnO layer as channel and an 100nm Al layer as source/drain electrodes. Both ITO bottom-gate and ZnO channel layer were deposited via radio-frequency sputtering at room temperature. And SiO2 layer was produced by plasma enhanced chemical vapor deposition (PECVD) at room temperature. After channel layer deposition, an aluminum (Al) layer was fabricated by e-beam evaporation without intentional heating to form source/drain electrodes which were patterned through the use of shadow mask. The channel length and width-to-length ratio of the TFTs is 80μm and 5:1, respectively. The electrical characteristics of the ZnO-TFTs were measured in air ambient.The threshold voltage was 0.4 V, which indicated ZnO-TFT operating as an enhanced-type mode. The equivalent field-effect mobility, current on/off ratio and subthreshold voltage swing were estimated to be 28.8 cm2/Vs,3×106 and 84 mV/decade, respectively. And off-state current was as low as 0.18 nA.ZnO thin-film transistors operated at low operation voltage of only 2.0 V, which have potential application for lower-power, portable electronics. We propose an electric double layer(EDL) mechanism to explain such experiment results. The main point is based on mobile protons in mesoporous SiO2 dielectric deposited by PECVD. The EDL mechanism can be verified by the measurement of capacitance-frequency (C-f) test. We found that the gate specific capacitance was as large as 1.88μF/cm2 and the equivalent dielectric thickness was estimated to be 1 nm.The long term stability of the ZnO-TFTs deposited at room temperature was also measured and discussed. ZnO channel was highly affected by entironment. Maybe it was relative to aging of ZnO channel. But the improved methods of the stability of ZnO-TFTs need further investigation.Room temperature fabricated low-voltage ZnO-TFTs are very promising for next generation micro-electronics technologies based on high performance and low power.

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