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Research on High Performance Data Exchange Interface in Network Processor

Author: HeKe
Tutor: MaPeiJun
School: Xi'an University of Electronic Science and Technology
Course: Microelectronics and Solid State Electronics
Keywords: Net work Processor Data exchange Interface
CLC: TP393.05
Type: Master's thesis
Year: 2011
Downloads: 41
Quote: 5
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Abstract


With the development of network system, the bottle-neck of network system is more obvious. In order to overcome these bottle-necks, network system designers invent network processor. The assignment of data exchange interface is the data exchange between network processor and exterior network devices. Data exchange interface technology is one of the key technologies of completing network processor forward network packets and affecting network processor performance. In this context, combined with practice in the project, network exchange unit in network processor has been researched, designed and implemented. Functional verification at system level, post place and route simulation, and testing of the data exchange interface are accomplished.Key technologies of data exchange interface in heterogeneous multi-network processor are analyzed and researched in this paper, design the data exchange interface with 10/100Mb MAC and 1000Mb MAC devices separately in parallel pipelining structure network processor. When the data exchange interface connect with 10/100M MAC devices(slow port mode), network processor capture the ready state of ports through port ready polling mechanism, and when connect with 1000M MAC devices(fast port mode), network processor capture the ready state of ports through active request mechanism.Bring micro-packet sequence number and keep the micro-packet sequence by assisting high speed packet forwarding engine in fast port mode. Solve the problem of asynchronous clock domains by data buffer storage with two ports SRAM. Save processor resource by DMA mode. Design Pull/Push engine command alignment to arbitrate and queue instruction coming from high speed packet forwarding engine and SDRAM controller, and solve the problem that high speed packet forwarding engine threads send forwarding packet instructions synchronously.The implement of the data exchange interface is based on Verilog HDL, execute functional simulation, performance analysis and testing of board. Through functional simulation and the testing of board, we find out the data exchange interface can exchange network packets correctly between network processor and exterior MAC devices. From the performance analysis, we find out data exchange interface support 116.604MHz MAC device and its throughput is 2.508Gbps at least at 100MHz frequency.

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Computer applications > Computer network > General issues > Network equipment
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