Dissertation > Excellent graduate degree dissertation topics show
Research of SRAM-based FPGA Single Event Upset Fault Injection System
Author: WuShengTao
Tutor: HuFangMing
School: Xi'an University of Electronic Science and Technology
Course: Circuits and Systems
Keywords: SRAM -based FPGA Single Event Upset Fault injection Partial reconfiguration
CLC: TN791
Type: Master's thesis
Year: 2011
Downloads: 184
Quote: 0
Read: Download Dissertation
Abstract
|
SRAM -based FPGA has the unique advantage of high-density , low-cost , dynamic reconfiguration , etc. , to get more and more attention in the field of aerospace . But in the space radiation environment , SRAM -based FPGA compared to other types of programmable logic devices , such as ASIC, antifuse FPGAs are more susceptible to single event effects , especially single - event upset effects (single event upset , SEU ) the impact . For SRAM - based FPGA SEU anti radiation hardening and testing method has been relatively mature theory and test experience abroad , but the related technical blockade , as well as restrictions on the test conditions and resources , the late start of the domestic research in this regard , still in the exploratory research stage . How effective testing and evaluation of SRAM -based FPGA SEU effect , and to study the SEU reinforcement technology has become an urgent problem to be solved on this basis . In this paper, the part of the Virtex FPGA heavy with the technical design and implementation of a XCV300/BQV300 fault injection tool , the tool can be SRAM -based FPGA design SEU provides rapid low-cost simulation test . Thesis of SRAM - based FPGA Single Event Effects , especially the generation mechanism of SEU mitigation techniques for analysis and research , and on the the SEU effects of simulation and test using fault injection . Secondly , according to the structure of memory SRAM - based FPGA demonstrates the feasibility of fault injection technique Flip FPGA configuration memory bits to simulate the SEU effect discussed in this article fault injection solution , and on this basis . The SelectMAP part again, around the Virtex FPGA reconfiguration technology , elaborate hardware and software fault injection tool . Finally, by using the test system for the design of a typical FPGA design circuit fault injection testing SEU sensitive bits of the test circuit to verify the effectiveness of the system test herein .
|
Related Dissertations
- Research of Fault Injection for a Distributed System,TP338.8
- The Research and Implementation of Software Oriented Fault Injection Tool,TP311.52
- SRAM -based FPGA fault propagation characteristics of single-particle testing method,V467
- Research on the Key Technologies of Partial Reconfigurable Computing System,TP311.52
- Study of Reliability Estimation Method for Onboard Computer System,TP311.52
- Software Structure Design and System Safety Validation of Smart Transmitters Based on IEC 61508,TM46
- FPGA-based fault-tolerant technology onboard aircraft research and design,TP302.8
- FPGA-based dynamic partial reconfiguration technology, cogeneration centralized monitoring system and its implementation,TM621.6
- A Dynamically Partial Reconfigurable System Based on FPGA,TN791
- The Validation of BIT for Engine Digital Control System and the Study of Advanced BIT Testing Method,V233.7
- Spaceborne SAR control software fault injection technology research,TN958
- Research and Design of carrier-grade Linux drivers reinforcement,TP311.11
- Fault injection -based software security testing technology,TP311.52
- Research of Control Flow Detection Algorithm Based on Highly Reliable R80515,TP332
- AOP pointcut fault injection testing technology,TP311.52
- The Research System Robustness Testing Based on Fault Injection,TP311.52
- Itanium architecture for high-end fault-tolerant machine fault injection platform for the design and implementation of,TP302.8
- Research on Circuits Design Method for Error Tolerance,TN79
- The SOPC chip FDP2009 design validation , and chip reconfigurable Applied Research,TN402
- FPGA-based DDR2 SDRAM UDIMM memory fault injection tool design,TP333.1
CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Digital circuits > Logic circuits
© 2012 www.DissertationTopic.Net Mobile
|