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Research and Implementation of Security System for High-Speed Network

Author: ChenDong
Tutor: HuZuoHong
School: Beijing University of Posts and Telecommunications
Course: Communication and Information System
Keywords: GCM AES FPGA Encryption and authentication High-speed network
CLC: TP393.08
Type: Master's thesis
Year: 2011
Downloads: 72
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Abstract


With the continuous development of the Internet business, the growing demand of users, the network is development of high-speed network to the \At the same time, in the face of the security problems faced by high-speed data transmission process, you need to study for high-speed network security systems to protect the security and integrity of data in the data transfer process. The in-depth study of the security problems faced by the high-speed network for high-speed network encryption authentication algorithm GCM. Designed a high-speed, low-latency GCM hardware structure simulation and comprehensive analysis of the the GCM implementation structure design on a Xilinx FPGA platform; G/10Gbps high-speed Ethernet and combined application environment of the high-speed Ethernet frame structural analysis, design a safety system for high-speed networks, and to ensure the security and integrity of the high-speed network data transmission, and GE high-speed Ethernet, the completion of the actual network testing and validation. In this paper, the following work:. Discussion and summary of existing encryption and authentication algorithms, pointed out the advantages of the GCM algorithm Research summary of GCM algorithm. Analysis of high-speed access network security threats facing the security threats facing introduced for high-speed access network encryption the authentication algorithm GCM algorithm principle, proposed a GCM hardware structure of FPGA platform simulation GCM algorithm , comprehensive data throughput reached 28.476Gbps, to meet the requirements of high-speed networks. 3.AES encryption algorithm is the key technology of GCM algorithm simulation study, the realization of the AES algorithm on an FPGA platform; optimize the structure of the proposed AES implementation on FPGA platform the data throughput reached 82.65Gbps data The rate is higher than the other design and implementation, and resource utilization. The paper combined with high-speed Ethernet, high-speed network security systems designed to ensure the security and integrity of the high-speed network data transmission, Virtex-5 LX110T chip frequencies up to 209MHZ, can support data rates 26.75Gbps. Fully able to meet the security needs of the G/10Gbps high-speed network. Ethernet-based high-speed GE secure system, and build the access network environment, using IXIA Network Tester, the H3C switch, FPGAnic plate and fiber media, for the completion of the GE Ethernet data encryption and authentication and certification decryption. This article provides the security system in the course of testing, in accordance with the specific circumstances of the test vectors and actual GE high-speed Ethernet, successfully completed testing and validation, that this security system to provide reliable high-speed network security. Based on the above research, the paper proposed a high-speed, low-latency GCM implementation structure to meet the network requirements of data encryption and authentication of 10Gbps or higher rate; designed and implemented a system for the GE Ethernet encryption and authentication security . The full text is organized as follows: Chapter 1: Introduction This paper studies the background, pointed out the advantages of the GCM algorithm research status summary of GCM algorithm. Chapter II: analysis of the current high-speed access network security threats faced, for the presence of security threats, introduction GCM algorithm principle, the proposed structure a GCM hardware simulation to verify the correctness of the GCM algorithm on the FPGA platform, comprehensive post the data throughput reached 28.476Gbps Chapter: study high-speed implementation of AES on an FPGA platform, the proposed the Pipelined achieve an optimized structure, the shortest critical path AES implementation, comprehensive data throughput highest. Chapter 4: Combining high-speed Ethernet, high-speed network security systems designed to ensure the security and integrity of the high speed network data transmission, using the Virtex-5LX110T chip, can support data rates fully able to meet the security needs of G/10Gbps high-speed network and resource utilization. Chapter: Ethernet-based high-speed GE, secure system, and build the access network environment for the completion of the GE Ethernet data encryption and authentication and certification decryption in accordance with the test vectors and GE high-speed Ethernet specific circumstances The test verifies the correctness of the security system. Chapter 6: summary of the research for this article, and look to the future.

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Computer applications > Computer network > General issues > Computer Network Security
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