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ICS wireless digital repeater system design and implementation

Author: QianRui
Tutor: HeZiShu
School: University of Electronic Science and Technology
Course: Signal and Information Processing
Keywords: Repeater Echo Canceller DLMS Digital down conversion FPGA
CLC: TN949.197
Type: Master's thesis
Year: 2011
Downloads: 78
Quote: 0
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Abstract


Since 2008 SARFT began to promote digital terrestrial television , digital television terrestrial broadcasting (DTMB, Digital Terrestrial Multimedia Broadcast) has been rapid development. The rapid increase in digital TV subscribers for digital television terrestrial broadcasting network coverage poses a severe test. Wireless RFR can effectively improve the signal coverage and reduce blind spots, and compared with the base station , its biggest advantage is to install a flexible and cost-effective use of wireless RF repeater for wireless network optimization can improve overall network the efficiency of the RF repeater in the wireless network application DTMB digital TV in China can contribute to the promotion . Wireless RFR 's main function is to use the receiving antenna receives signals from the base station , and then take advantage of the transmitting antenna to amplify the received signal forwarded . And the receiving antenna and the transponder echo coupling between the antennas , the efficiency of the key limitations hinder repeater , since the repeater would like to receive the amplified signal as to increase coverage area , but often the isolation between the antenna enough, resulting signal is forwarded receiving antenna , thereby undermining the forward signal spectrum and even cause the system to self-excited. In this paper, the coupling RFR echo problem , based on DTMB signal, and the use of adaptive algorithm is proposed ICS ( with interference suppression system ) wireless digital repeater detailed implementation plan . First on the radio channel characteristics , DTMB standards and echo suppression scheme has been studied for the ICS algorithm is designed to provide a simulation preconditions. Then, the LMS (Least Mean Square) algorithm and its implementation algorithm DLMS (Delay-LMS) are discussed and carried out under the above conditions floating-point and fixed-point simulation for FPGA implementation provides a theoretical reference. On the other hand , discussed the IF processing program for the core algorithm provides a data interface program . With the above basis , further baseband algorithms and IF processing algorithms for FPGA implementation and completion of each module functional simulation . Finally, in complete digital system integration and build the entire repeater system after commissioning tests carried out and analyzed the test results validate the system functionality.

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