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FC protocol analyzer FPGA research and design

Author: LinShunPing
Tutor: TuXiaoDong
School: University of Electronic Science and Technology
Course: Communication and Information System
Keywords: Fibre Channel Protocol Analyzer trigger system FPGA Xilinx ML555
CLC: TN915.04
Type: Master's thesis
Year: 2011
Downloads: 106
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Abstract


With the rapid development of information technology, company, users and research institutes have generated massive data, which causes the technology of network data storage to be largely used. The Fibre Channel technology has been widely applied in the field of network data storage because of its unique advantages. So the scale and complexity of the Fibre Channel network continuously improve, which brings greater challenge to network engineers and also brings more opportunities to the FC equipment manufacturers. The Fibre Channel analyzer plays an important role, which can improve the efficiency of network engineers to debug FC networks and can also reduce the period of the FC devices’development or testing.The purpose of this paper is to study and design of a FC protocol analyzer based FPGA, which requires low complexity of implement and cost, but haves basic functions. This paper firstly studies the Fibre Channel protocol including FC protocol levels, network topology, communication mechanisms and other basic knowdge and then introduces functions and technical data of the AIM’s Simulyzer APG-FC4 (1,2,4 Gbps). Based on the above analysis, functional requirements and system architecture of the FC protocol analyzer are proposed in this paper. The mainly modules of system architecture, including data acquisition module, trigger system module, data storage module are described from the perspective of principle or algorithm. Besides, matching algorithm - segmentation lookup algorithm based on storage table proposed in this paper are datailed.Then, the FC protocol analyzer is implemented on Xilinx ml555 FPGA development board. And this paper describes the mainly modules of the system architecture how to implement in the FPGA development board, gives a large number of state machines, and carries out the corresponding functional simulation using Modelsim.Finally, a scheme of simulation and verification for key module—trigger system is proposed in this paper, and synthesizable verilog codes are written based this scheme. Later, the system testing scheme of the FC protocol analyzer joining the driver, GUI and other application programs is also proposed in this paper, test results show that the analyzer can achieve the design requirements and implement basic functions of the FC protocol analyzer .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Communicate > Communication network > General issues > Communication protocols, communication protocols
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