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Research of MEMS Acceleration Sensor Detection Circuit Based on Adaptive Filter

Author: ZhangShu
Tutor: DongZuo
School: Jilin University
Course: Circuits and Systems
Keywords: MEMS acceleration sensor adaptive filter detection circuit FPGA VHDL
CLC: TN713
Type: Master's thesis
Year: 2009
Downloads: 245
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Abstract


As an important inertial sensor, micro-machined accelerometer has broad applications prospect in many fields, such as automobile, industrial control, scientific measurement, consumer electronics, also in military. Area changeable capacitive micro-machined accelerometer which was researched in this thesis is very small. In general its capacity is only a few PF, and differential capacitance is smaller. Because capacity is so small, we need a special circuit to detect it. It is to say performance of detection circuit determine performance of sensor.Nowadays, most of sophisticated detection circuits are analog approaches,so at first this thesis chosen the single-carrier dual integrator modulation detection circuit which includes Charge amplifier, band-pass filter, phase adjuster, phase-sensitive demodulator and so on to detect differential capacitance signal. Through many times experiments, I achieved the circuit, but I also found many disadvantage on analog approach. First I can hardly make Charge amplifier circuit completely symmetric. Second high-quality factors band-pass filter is hard to design and it is so unstable, but low-quality factor band-pass filter is redundancy. Third the circuit has disadvantage of stability and repeatability and it is difficult to debug circuit. I want to improve the detection circuit, because of these disadvantages.Charge amplifier was still chosen for first class circuit, but digital filter took the place of analog filter. This thesis didn’t choose classical digital filter but adaptive filter to fulfill filtered goal. Adaptive filter is a special type of digital filter. It comprises adjustable parameter digital filter and adaptive algorithm. Adjustable parameter digital filter includes infinite impulse response (IIR) filter, finite impulse response (FIR) filter and lattice digital filter. In this thesis I designed adaptive notch filter which belong FIR filter. Adaptive algorithms include least mean square (LMS) and recursive least square (RLS), and the other algorithm mainly derive from them. LMS algorithm has the advantage of little computation complexity, simple structure and real time processing function, but it converges slowly and brings weight vector noise, so generally this algorithm is not used directly. RLS algorithm has the advantage of quick convergence speed, perfect filter result can be got at a small amount of data available, but its defect is that computation complexity will enhance with filter order increasing.This thesis gives many improved algorithms according to theoretical analysis and use MATLAB simulation to compare advantages and disadvantages of every adaptive algorithm. Then this thesis chooses three fitting adaptive algorithms which can be further discussed in detail. Because MATLAB simulation works under ideal conditions and it has great difference with actual result, so then these three algorithms carry out timing simulation by QuartusII software. Timing simulation which calculates data by Limited accuracy is more Close to the actual result. The filter performance of every algorithm is worse than before. Especially the performance of ELMS is similar to the performance of LMS.Although simulation is so close to actual result, but this thesis can not fully prove the performance of adaptive filter if there is no actual result, so we need design hardware circuit. Because FPGA has the advantages of flexibility and real-time, so in this thesis the chip is EP1C6Q240C6(Cyclone series FPGA made in Altera company). After we achieve FPGA system board, this thesis use Embedded logic analyzer and oscilloscope to measure the filter result of every algorithm. This thesis obtain that RLS filter is more suitable for the design according to measurement. RLS filter has the advantage of more smooth, smaller dithering and better filter effectiveness, in addition its computation don’t exceed FPGA Hardware resources. The entire circuit of RLS filter includes gain updating part, vector updating part, error updating part, and autocorrelation matrix updating part, while every part was made of simple digital circuits. This thesis compile program In accordance with the frame

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Filtering techniques,the filter
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