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Study on Realization Technologyof Real-time Brain-Computer Interface Based on FPGA

Author: WangYong
Tutor: TianFengChun;HeQingHua
School: Chongqing University
Course: Signal and Information Systems
Keywords: brain-computer interface (BCI) FPGA visual evoked potential (VEP) visual stimulator extraction and recognition
CLC: TP334.7
Type: Master's thesis
Year: 2009
Downloads: 323
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Abstract


Brain-computer interface (BCI) gives its users communication and control channels that do not depend on the brain’s normal output channels of peripheral nerves and muscles. BCI is a closed-loop system consisted of human and machine. Except human, BCI system mainly includes: signal collection system, feature extraction and parttern recognition system, external device and control system. The key of BCI is the conversion algorithm, the purpose of which is to convert EEG signal inputted by user into output control signal. Because of its great value in rehabilitation engineering and other fields, BCI has drawn attention of scientists in biomedical engineering, computer technology and communication. However, as a new multi-subjects communication technology, most BCI research is in theory and laboratory stage, its practical application is still under development.The research on the realization technology of real-time BCI based on FPGA is carried out in this paper. In order to realize BCI, there must be a signal to reflect the different states of human brain. Transient visual evoked potential (VEP) is relatively easy to be detected, and doesn’t easily cause visual fatigue. Thus, it’s used to realize BCI.Computer is used as controller and data processor among the existing BCI systems. Instead of computer, FPGA is used to construct a new real-time BCI system. So the features and advantages of FPGA are applied in the realization technology of BCI.EEG collection circuit is designed in this paper. It includes active electrodes, driven-right-leg circuit, preamplifier circuit, high pass filter circuit, amplifying and filtering circuit, low pass filter circuit, voltage lifting circuit, AD conversion circuit and optocoupler isolation circuit. Signal noise ratio (SNR) is raised by amplifier and filter, then digital signal is generated by AD conversion.VGA monitor is adopted as visual stimulator, and stimulation pattern is produced through VHDL program in FPGA. So VGA visual stimulator based on FPGA is realized. This kind of visual stimulator has the advantage of visual stimulator realized by hardware or software. It’s a new method to realize visual stimulator.VEP signal processing method and its FPGA realization are studied in this paper. Averaging method and digital filter are combined to extract VEP signal. Digital filter contains FIR filter and twice five-point symmetrical filtering. Wavelet decomposition coefficients of averaging signal show distinguishable feature of VEP. VEP signal recognition method includes time-domain waveform correlation algorithm, quantitative product of feature vector algorithm and wavelet decomposition coefficients algorithm. The signal processing algorithm is realized by VHDL program, IP core of DSP operation and embedded multiplier in FPGA.BCI experiments have been carried out successfully. Experimental results indicate that, the real-time FPGA based BCI system constructed in this paper can achieve relatively high accuracy and speed, and satisfy the requirement of real time and precise.

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > External device > Interface devices,plug-in
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