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Application of high-performance FPGA -based research and design and implementation of the DLL

Author: HuangXiang
Tutor: ZhuangZuoZuo
School: Xi'an University of Electronic Science and Technology
Course: Microelectronics and Solid State Electronics
Keywords: Clock Synchronization Delay locked loop Variable delay line
CLC: TN432
Type: Master's thesis
Year: 2009
Downloads: 305
Quote: 4
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Abstract


With the ultra- large-scale, rapid development of high-speed integrated circuits , digital systems are becoming more integrated , faster and faster computing . In the high-density FPGA, the clock distribution chip quality becomes more important. Clock delay and clock skew has become an important factor affecting system performance . FPGA clock delay locked loop as an important part of the network , you can reduce clock skew , the system provides a series of clock genlock functionality to meet a variety of FPGA timing needs. In order to effectively eliminate the FPGA chip clock delay , reducing the clock skew , this study was designed FPGA-based digital delay locked loop . In the design of digital delay locked loop , the first to complete the circuit design of the overall architecture , and analysis of each basic module of the principles and methods . The structure of its all-digital unconditionally stable , does not accumulate phase error. Out of consideration for reducing power consumption , the circuit also introduced LDO (low dropout linear voltage regulator ) circuit , not only reduces the DLL delay module 's power consumption, but also to some extent, saving logic resources. This thesis studied all digital delay locked loop circuit is a standard process models based 0.22μmCMOS under 300,000 FPGA chip clock management section. The simulation proved that the DLL to allow normal operation of the clock input range 50MHz to 200MHz, the propagation delay in the elimination of the clock , clock synchronization , while also providing the clock multiplier , a variety of sub-frequency clock and clock phase shift .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > Semiconductor integrated circuits ( solid state circuits ) > Field-effect type
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