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Correlator design based on the FFT fast catching algorithms GPS receiver

Author: WangChenJing
Tutor: YangXinMin
School: Nanjing University of Technology and Engineering
Course: Navigation, Guidance and Control
Keywords: GPS correlator Fast acquisition algorithm High dynamic FFT FPGA Doppler shift
CLC: TN967.1
Type: Master's thesis
Year: 2010
Downloads: 298
Quote: 2
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Abstract


Global Positioning System (GPS, Global Positioning System) with its advantages of high-precision , all-weather , and strong real successful occupy in all areas of national life , its application in the military field has broad prospects for development . The correlator is the core part of the GPS receiver to determine the performance of the GPS receiver . The breakthrough has become the subject of the late start and the U.S. export restrictions correlator chip , existing correlator has been unable to meet the demand for more applications , independent research and development of high performance correlator . High dynamic movement is generated in the GPS signal on a larger Doppler frequency shift, so that the carrier and the pseudo-code tracking loop easy to lose lock , it is difficult to maintain the carrier and the pseudo - code synchronization , thus rapidly capture the satellite signal , and to improve the tracking loop is provided solve the core and critical high dynamic concept vector applications . Focused satellite quickly capture first study the related works , and a study comparing several common fast acquisition algorithm . Secondly , in the parallel search acquisition method of the frequency domain based on its shortcomings improved ways to shorten the length of the Fourier transform of the difference frequency , resulting in a new fast - acquisition algorithm based on the FFT , and in principle proved that the method feasibility. In this paper, to increase channel design method to shorten the time to first fix . Part of the planning and design of parameters in multi-channel correlator using a hardware description language Verilog HDL sub-module programming and the system as a whole to achieve sub-module , and is overall functional simulation and timing simulation in Modelsim obtained the longest 1.056s theory capture time . Finally, the use of field-programmable gate array (FPGA, Field Programmable Logic Array) chip correlator as relevant for the realization of the carrier , in the GPS receiver based on the design of the correlator on the board debugging , validation of this paper, the design of multi- - channel , high-precision normal good working . Flight tests , and live ammunition carrier within 10s TTFF .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Radio navigation > Navigation systems of the various institutional > Satellite navigation system
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