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FPGA- based hardware genetic algorithm technology research

Author: ZhaoWeiQing
Tutor: ChenQingWei
School: Nanjing University of Technology and Engineering
Course: Control Theory and Control Engineering
Keywords: Genetic Algorithms Hardware Implementation Parallel FPGA TSP
CLC: TN791
Type: Master's thesis
Year: 2010
Downloads: 178
Quote: 4
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Abstract


Genetic Algorithm (GA) is a kind of optimization methods based on Natural Selection, which is applied to many difficult optimization problems. GA has been widely used in many areas; however, application of GA to increasingly complex or accuracy required problems will cause unacceptable delays in optimization process which limit the applications of GA to many real-time systems and problems. Compared to software implementation, hardware system is superior in aspects of real-time and parallelism, but short for flexibility and compatibility.Focusing on these conflicts, modules are divided based on functions, in order to suit for different problems in different circumstances. Modules are divided into two kinds:system function modules and GA operator modules. The advantages of the division are that different GA operations can be chosen to complete the algorithms, according to different problem requires, without changing system architecture.In this paper, system function modules and GA operator modules are implemented using VerilogHDL language based on Xilinx Virtex5 series FPGA platform, including system function modules, such as, Pseudorandom Random Number Module, Random Number Interface Module, Memory Interface/Control Modules, System Control Module and so on, and GA operator modules, such as, Basic Digital Crossover Module, PMX Crossover Modules, Basic Digital Mutation Modules, Position Change Mutation Modules, Reverse Mutation Modules and so on. Construct the library of GA operators and architecture of system, which not only contribute more flexibility and compatibility to hardware implementation of GA, but also maintain the stability of the system architecture.Multi-peak, noncontinuous, nondifferentiable function and 16 cities traveling salesman problem (TSP) are designed for testing this hardware platform of GA. According to the test result, hardware platform obtained the optimal solution error within 1%. Meanwhile, on solving some complex problems, the speed is accelerated 2 orders of magnitude compared to software. And A Coarse-Grained Parallel GA Module is designed for solution of TSP. Competed basic double-core Coarse-Grained Parallel GA Module, hardware compute speed is increased nearly 1 times further, received a significant effect.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Digital circuits > Logic circuits
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