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Research and Design of CAN Controller

Author: GengFangXin
Tutor: FuJiaLin
School: Beijing Jiaotong University
Course: Computer Science and Technology
Keywords: CAN CAN controller FPGA Verilog HDL Acceptance filtering CRC checksum
CLC: TP273
Type: Master's thesis
Year: 2010
Downloads: 588
Quote: 5
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Abstract


Controller Area Network CAN (Controller Area Network) is a serial communications bus is a field bus category defined by ISO . CAN bus with its high performance, high reliability, and flexible design increasingly attention has been paid , has been widely applied in the field of automotive, aerospace , industrial control , and forward more developments in the field . The key part of the CAN network bus controller , CAN bus controller device CAN bus communication protocol requirements , and is an important part of each control node connected to the bus . CAN bus controller currently exist on the market are customized according to the standard good, the CAN controller electrical parameters are often not the same , is not compatible with , and CAN controller are a wide variety of standardized products , to achieve additional the function , you need to ride outside the circuit, it is more complicated to achieve . This paper presents a CAN bus controller FPGA - based implementations , given its structure diagram , and each module within a more detailed description . In this paper, the correctness of the top-down design of the CAN controller chip design and simulation tools to ensure the functionality of the design . Firstly combination of the CAN bus protocol analysis of existing CAN bus controller (Philips controller SJA1000) divided the entire CAN bus controller chip architecture , the CAN bus controller is decomposed into several functional modules. Which completed the design of the the acceptance filter module and the CRC module . This article introduces the principle of acceptance filtering and CRC check specific implementation process and the use of Verilog HDL functional simulation and FPGA development tools Quartus II , to prove the correctness of the functional modules function , and gives them the RTL level schematic and simulation waveforms . The inadequacies of this article is that there is no other modules , such as the register module and bit timing logic modules, etc. detailed study and design of the future need to do further work .

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CLC: > Industrial Technology > Automation technology,computer technology > Automation technology and equipment > Automation systems > Automatic control,automatic control system
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