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Hardware Design and Implementation of qn PON Based Real-time Ethernet

Author: LongQun
Tutor: LiXinWan
School: Shanghai Jiaotong University
Course: Electromagnetic Field and Microwave Technology
Keywords: Real-time Ethernet Passive Optical Network FPGA CAN bus
CLC: TN929.11
Type: Master's thesis
Year: 2010
Downloads: 119
Quote: 0
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Abstract


A long time, the field bus technology in the field of industrial control debated, it is difficult to form a unified standard, interoperability and interoperability problems difficult to solve, so Ethernet began to enter the field of industrial control. Ethernet for industrial control field to solve the problem is that the uncertainty of the real-time industrial control and time. Real-time Ethernet (Real-time Ethernet, RTE) techniques appear to solve this problem, can meet the needs of the high real-time performance of applications. This article is from the perspective of Ethernet, Ethernet passive optical network (Ethernet Passive Optical Network EPON) technology and integrate real-time Ethernet technology and innovation to put forward a point-to-multipoint passive optical real-time Ethernet network (Real-time Ethernet Passive Optical Network, REPON) concept. Compared with the existing real-time Ethernet point-to-point link connection, REPON network using point-to-multipoint PON structure, help to improve the real-time nature of the network. At the same time, the use of field-programmable gate array (Field Programmable Gate Array, FPGA) REPON corresponding node hardware design can improve the real-time signal processing capabilities. The hardware system for REPON exploration and research, the main contents are as follows: 1) design a REPON overall network architecture, including PON network structure, communication hierarchical model-based and FPGA-based hardware system architecture. REPON by a central node, a plurality of access nodes, as well as the optical distribution network, each access node is connected to a number of user service subnets, each user service subnet by REPON real-time data exchange. 2) According to the structure of the hardware system, designed and realized corresponding to the central node and the access node in the hardware circuit. Concrete work including: hardware circuit design in accordance with the various functional modules node corresponding node; schematic design and schematic design, the central node and access node hardware board; Task Force brothers realize the physical layer module , based on the increase in burst reception and the burst transmission control mechanism to achieve the physical layer hardware logic of REPON Fast. 3) the use of a hardware circuit has been achieved, the test of the CAN (Controller Area Network) bus business to build a support system, the stability and reliability of the system hardware to verify. Through the the hardware basic functional testing, functional simulation of the physical layer validation and simulation business test confirmed REPON system can be stable and reliable operation, and its physical layer transceiver on the fiber link error rate below 10-9.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Wireless communications > Lightwave communications, laser communications > Optical fiber communication
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