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Compact JTAG Design and Verification

Author: XuZhiLei
Tutor: MaoZhiGang；ZhangJiaNing
School: Shanghai Jiaotong University
Course: IC Engineering
Keywords: CJTAG interface Control level IEEE STD 1149.1 IEEE STD 1149.7 JTAG interface Zero scan
CLC: TN402
Type: Master's thesis
Year: 2010
Downloads: 89
Quote: 4
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Abstract


With increasing chip integration and low power design requirements , originally developed based on the IEEE 1149.1 standard JTAG interface to face new challenges , can not meet the needs of today 's design . CJTAG based on IEEE STD1149.7 standard and traditional JTAG boundary-scan principle provide a more powerful test and debug interface , to achieve the requirements of the present system . CJTAG with fewer pins to provide more functionality , while at the same time ensure the IEEE1149.1 software and hardware compatibility . Its features include six levels, an upper level (Class) contains all the features of its lower level (Class) . CJTAG interface provides a scalable solution to achieve the needs of the different modules and complex system . In this paper, IEEE1149.7 standard based to achieve a CJTAG test interface , due to the application of the zero DR scan mode generates zero scan ( ZBS ) , then ZBS counter latch control level (Control Level) function , by the value of the control stage is to generate various commands , and ultimately significantly improved scanning performance and good control of the power consumption of the test logic . While also providing a reusable and configurable verification platform , we the functionality CJTAG do full verification to ensure the correctness of its implementation . Actual chip design and verification of CJTAG as a test and debug interface , it will get more widely used . This article briefly the JTAG and CJTAG function on the basis of , focused on the part of the author involved in the design and verification of description .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > General issues > Design
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