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The Research and Development of Video LED Network Controller Based on a Single-Chip

Author: ZhuangChe
Tutor: BaiRuiLin
School: Jiangnan University
Course: Control Theory and Control Engineering
Keywords: SOPC IP Protocol FPGA Processor Design
CLC: TP273.5
Type: Master's thesis
Year: 2008
Downloads: 168
Quote: 3
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Abstract


In recent years LED technology has been developed very quickly and LED Color Display has been applied widly.The display technology of LED includes micro controller,video,optics mechanics and digital image manipulation etc.In order to improve the defects and solve difficulty of LED display,the author puts forward a new scheme of LED display system.The topics targeted at video LED screen development needs, based on the single-chip to the big screen network control system. The programme full use of Altera’s NiosII soft core processor SOPC technology, as well as building a network controller hardware platforms. The card chip LAN91C111 driver was designed with C language,and the hardware description language VHDL and Verilog HDL was used to achieve a custom IP core design. SOPC coordination in the system hardware and software design, the addition of custom IP core and optimization Driver procedures, and realization of the TOE RDMA functions, and external SRAM, as well as a large-capacity FIFO and related peripherals sequential logic.According topic needs, the system is divided into a number of functional modules, based on the Construction of single-chip LED video network controller systems, and its key technologies were studied. This paper is divided into seven chapters, and many were from the design of the project carried out a detailed exposition. The first chapter on the background of the topic, LED big screen’s current situation and development trend of the analysis, the task of a proposed topic.The second chapter from the overall structure of the system, the set of principles, software and hardware components and development tools.Introduced in Chapter three TOE and the realization of RDMA functions, including the use of DMA, IP protocol receiving end processor design steps and output control module design steps, using external SRAM FPGA and build a large-capacity FIFO, video data stream buffer.The fourth chapter on the part of the software system, the Driver focused on the design and realization of HAL DMA.The fifth chapter talked about the overall system controller from two aspects of the project design was tested.The final chapter on the design of the system done summary of the follow-up projects and design the future.In this paper, starting from research and development projects based on the single-chip LED large screen network controller design process carried out a detailed description and analysis of the functional modules and the achievement of the simulation test. Stratix EP1S10F780C6 system in achieving placement and routing,when NiosII work in the 50 MHZ, the receiver UDP packet bandwidth of 60 Mbps.The system of the logic of occupation to 4,558 units, accounting for 43 per cent of total resources.The overall test results show large screen images smooth, flicker-free screen, Huaping phenomenon, while simplifying the installation, thus shortening the development cycle, the development of low-risk, which have a certain competitive in the marketplace.

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CLC: > Industrial Technology > Automation technology,computer technology > Automation technology and equipment > Automation systems > Automatic control,automatic control system > Computer control, computer control system
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