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Design and Implementation of Low Phase Noise DDS Based on FPGA

Author: YuFeng
Tutor: TianRiCai
School: Harbin Institute of Technology
Course: Information and Communication Engineering
Keywords: DDS FPGA spur phase truncation ROM compression
CLC: TN741
Type: Master's thesis
Year: 2007
Downloads: 685
Quote: 9
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Abstract


The invention of Direct Digital Frequency Synthesizer (DDS) is a revolution of frequency synthesis technology. DDS has shown its advantages increasingly along with the development of digital circuits and microelectronics technique. Now it has been widely used in the fields of communication, radar, electronic counter, apparatus, etc.The Direct Digital Frequency Synthesizer is a kind of fully digitized frequency synthesizer, which consists of phase accumulator, sine look-up table, digital to analog converter, and low-pass filter. It has high frequency resolution, fast frequency switching speed and the ability to switch frequencies while maintaining continuous-phase. But the serious spurs in the output spectrum of DDS limits the further usage of DDS.The hardware kernel of this design is XC3S100E of Spartan-3E series FPGA made by Xilinx Inc. The whole system is described with Verilog HDL and developed by ISE 8.2i. The frequency resolution of DDS can be reached 0.035Hz. The results of simulation proved that the optimizing methods we used are very useful, and an improvement about 30dB was got in the DDS digital output spectrum.The dissertation firstly introduces the significance of realizing the DDS based on Field Programmable Gate Array (FPGA), the present situation and development of DDS. Secondly, the theory of DDS is introduced, then the paper analysis the output spectrum characteristics of DDS. Especially, the influence of the phase truncation error on DDS is discussed at length and the simulation is presented. Thirdly, the basic structure and design flow of FPGA is introduced. At the same time how to realize the design of models of DDS in FPGA is presented in detail. In this design, there are three methods to restrain spur, they are using the improvement Nicholas phase accumulator, adopting the ROM compression technique of DDS special chip enhancing the compression ratio to 113.7: 1. It has a good performance in restraining spur. The third method is amplitude jitter injection. Finally, some hardware electric circuits are presented. Implementation DDS based on FPGA, the function of DDS is completely decided by the designer. The system can be complex also can be simple. Realized the function of DDS with general FPGA is one kind of attempt that make the dedicated hardware software. It is a practical application of software radio.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Frequency synthesizer technology,frequency synthesizer > Direct method
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