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The Realization of Multi-Channel TETRA Demodulator Based on Undersampling

Author: YueWu
Tutor: MengWeiXiao
School: Harbin Institute of Technology
Course: Information and Communication Engineering
Keywords: TETRA Subsampling Rate. demodulation Digital Down Conversion FPGA
CLC: TN763
Type: Master's thesis
Year: 2007
Downloads: 111
Quote: 0
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Abstract


With the development of science and technology, people have entered the era of digital communications, increasing attention has been paid as a dedicated digital trunking communication system for mobile communication system. The TETRA protocol standard of digital trunking mobile communication system recommended industry standards, the most widely used applications in China dedicated mobile communication system now. With the 1990s, the rise of software radio concept, under-sampling techniques in many practical software radio products have been favored, while traditional TETRA channel receiver is essentially just a traditional analog communications equipment digitization process, yet application software radio theory to achieve multiple TETRA channel receiver. Discussed in this article is the application of the principle of under-sampling, direct sampling of the multi-channel 70MHz IF carrier TETRA channel signal, and signal demodulation. The text is divided into three main parts: First, the research background of the thesis work briefly, a brief introduction Pi/4-DQPSK modulation, recalling the process of rapid development and its Analysis of trunking communication system and analyzed future direction of development. Subsequently, from the system design requirements, obtained the overall design of the system, through the discussion of the IF sampling theory and digital down-conversion technology, and determined by the analysis of the main devices of a specific device settings; introducing the hardware design part of the paper describes in detail about Protel DXP software application methods and design processes, and the design should pay attention to, and gives each part of the system hardware schematic and PCB map; in software design, this paper introduces the VHDL language features and ISE design software design process, distributed FIR filter and IF differential principle of testing demodulation algorithm and specific processes and simulation results are given in the system application of the above two The algorithm for the branching filter and Pi/4-DQPSK signal demodulation. At the end of this article describes the system hardware and software debugging process, given the problems encountered and solutions, and pointed out the need to pay special attention to the problems in the process of debugging Finally, the experience gained during the commissioning process to make a relatively complete summary. The system is designed thinking in line with current software radio theory and practice of development trends, to achieve a complete multi-channel TETRA channel signal demodulation processor, but also to use as a test platform for a variety of digital signal processing, in practical work has a high practical value.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Modulation technique and the modulator,demodulator and the demodulator > Demodulation technique and demodulator
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