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Research and hardware implementation of very short reach optical interconnect agreement

Author: DingLiang
Tutor: ZhouDong
School: University of Electronic Science and Technology
Course: Optical Engineering
Keywords: optical interconnection serial protocol FPGA Memory-Box Server
CLC: TN929.1
Type: Master's thesis
Year: 2008
Downloads: 98
Quote: 1
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Abstract


Very Short Reach Optical Transmission Technology (VSR) is an important orientation of system interconnection field because of its excellent performance such as high bandwidth, low wastage, etc. The optical interconnection technology applied to board to board or chip to chip interconnection is very different from traditional Backbone optical transmission, and its interconnection protocol is also very special. Now there is in lack of such a protocol standard aimed at board to board or chip to chip interconnection application. In the background of Memory-box Server application based on VSR, the dissertation researches into the protocol suited for optical interconnection in very short scale, then implemented it based on FPGA technology.According to the requirement of Memory-box system, the interconnection protocol for VSR is a point to point, lightweight, full duplex protocol which moves data across high-speed serial lanes, covering the link layer and physical layer. The protocol offers user interface to upstream application, and provides high-speed data transmission service through optical interconnection.The dissertation researches the protocol mechanism, selects and optimizes elements of the mechanism, including frame format, data transmission and receive process, link training and initialization, and also error detect operation and flow control.To implement the protocol’s function, the dissertation chooses Virtex-II pro FPGA with embedded high-speed serial transceiver (SERDES Serialer/Deserialer). The physical layer is implemented using SERDES with 8B/10B, clock and data recovery digital analog mixed circuit. The link layer function is implemented by modeling using Verilog HDL. At the same time the dissertation has researched the multi-lanes bonding mechanism. After Verilog coding, a test scheme is designed to verify the protocol’s function and timing in Modelsim.And then to build experiment platform, the dissertation design a optical module test board, choosing SFP (Small Form-factor Pluggable) as optical equipment. With the memory board which has DDR SDRAM and Virtex-II pro, the SFP test board constitutes the optical link hardware experiment platform. The dissertation also designs a Memory Array Access application to verify the optical interconnection protocol. The memory read/write requests is transferred across the protocol channel. On the experiment platform the data transmission rate is up to 2Gbps with single lane. The experiment show the protocol can stratify the requirement of Memory-Box server.In the end the dissertation give a scheme to test the jitter of the high-speed differential signals. The test result shows that using optical interconnection technology can increase the transmission distance and improve the quality of signals.The VSR protocol provides high-speed data transmission through optical link. Other industrial standard data can easily be transferred across the channel of the interconnection protocol. Of course, more complex and useful protocol with address space can de developed based on the VSR protocol. The design in this dissertation shows high reference value to the research and design of protocol aimed at board to board and chip to chip optical interconnection.

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