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High precision displacement measurement the radar program design and signal processing

Author: YanPing
Tutor: WangXueGang
School: University of Electronic Science and Technology
Course: Signal and Information Processing
Keywords: Landslide Monitoring Displacement measurement CORDIC algorithm Digital Down Conversion FPGA
CLC: TN959
Type: Master's thesis
Year: 2008
Downloads: 116
Quote: 0
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Abstract


China is one of the countries of the world landslide disasters . The landslide monitoring can effectively predict landslide trend , provide the basis for landslide control and evaluation , to the maximum extent possible to reduce the loss of landslide disasters , has important practical significance . In this paper, the characteristics of landslide activity , New landslide monitoring method using low-cost high-precision displacement measurement radar monitoring of landslide activity . The monitoring radar system consists of an interrogator and answering machine , ranging phase method to achieve the principle of displacement monitoring of multiple observation points . Around displacement measurement radar system for in-depth analysis , focusing on the implementation of the the phase method ranging principle and signal processor . MATLAB simulation confirmed that the system to meet the demand for landslide monitoring , hardware test results show that the signal processor is able to achieve the requirements of the system of indicators , displacement measurement accuracy of 0.4mm . The main work of this paper include : (1 ) the characteristics of landslides activities carried out the preliminary design of the overall system program , conducted in-depth research and analysis , and a number of key technologies , a different carrier frequency asked signal distinction answering machine multiple access solutions and distance blur solution to the problem ; completion of a system of indicators demonstrate , and system simulation using MATLAB . ( 2 ) In accordance with the requirements of the displacement measurement radar indicators designed to signal processor implementations , and Capture CIS 10.0 PowerPCB 6.0 drawing the schematic diagram and PCB complete signal processor hardware design , implementation, and debugging . (3) based on the CORDIC algorithm is implemented on FPGA digital down conversion (DDC) and the characteristics of the baseband signal extraction completed phase measurements . (4) RS-232 serial communication module is implemented on FPGA design , MATLAB - based serial communication on the host computer . (5) preliminary test of the performance of the signal processor .

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