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A satellite communication link encryption technology research

Author: XiangHongQuan
Tutor: ZhouLiang；XieShangMing
School: University of Electronic Science and Technology
Course: Electronics and Communication Engineering
Keywords: Satellite Communication Cryptography Link Encrption Cipher Synchronization FPGA
CLC: TP309.7
Type: Master's thesis
Year: 2008
Downloads: 233
Quote: 1
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Abstract


With the development of information technology, especially the widespread application of satellite communications, the intercepting information becomes easier because of the opening communication channel, from which all kinds of instrument can be used to intercept and capture information.Considering the hidden trouble of the information leakage existing in the satellite communication system, this thesis studies the link encryption technique based on the profound analysis of the existed threaten on satellite communication and develop the technique project research and implementation on the science of cryptography. The main contents include:1. The satellite communications system is reviewed briefly. The survey, the element, the work process, communications scheme and satellite constellation etc. are introduced.2. The techniques of encryption and cipher synchronization are presented. Firstly, the basic theory, cryptographic terms, cryptosystem (algorithm) and cryptographic technique related to the thesis is introduced. Secondly, the classification of communication encryption technique, the characteristic of end-to-end encryption and link encryption, and the selection of encryption technique in communication link encryption are introduced. Finally, the conceptions, scheme, working sequence and performance of cipher synchronization technique are explained in details.3. The technique project of link encryption device is studied and designed. The satellite communication link encryption device which meets the requirement of the general frame is researched and designed firstly, and then each functional modules of encryption device is introduced briefly. The types of interface chips, CPU and FPGA/CPLD according to the function implementation are chosen, and the function feature of the apparatus and the parameters of the pin distributions are explained, at last.4. The circuit design, debug and test process of link encryption device are described in details. Firstly, each circuit functional module, schematic diagram, and the wholly PCB board are presented. Then, the FPGA/CPLD design, the CPU software function flow and so on are introduced. Finally, the debugging and test for link encryption device are proposed.Finally, it is the conclusion and outlook for the thesis.

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > General issues > Security and confidentiality > Encryption and decryption
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