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The Design and Implementation of the Digital Receiver for Aeronautical Satellites

Author: ZhangLiQiang
Tutor: HouChunPingï¼›HouYongHong
School: Tianjin University
Course: Communication and Information System
Keywords: Aeronautical satellite communication system FPGA (Field Programmable Gate Array) Digital Signal Processing Nios II system
CLC: TN851
Type: Master's thesis
Year: 2007
Downloads: 104
Quote: 0
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Abstract


INMARSAT aeronautical satellite communication system is not only to provide reliable voice and data communication services for the aircraft , and air traffic control , aircraft operation control information can be transmitted , thus significantly improving flight safety conditions . In this paper, on the basis of the navigation satellite system protocol , designed and implemented multiple satellite channel digital receiver . This article first briefly describes the composition of the the INMARSAT aeronautical satellite communications systems and applications ; then the analysis of the system 's hardware platform design , FPGA with high-speed digital signal processing capabilities , suitable for real-time signal processing , Altera Corporation Cyclone II as the core device the design of the satellite receivers the digital portion of the hardware circuit; then focused on the baseband digital signal processing implementation of the satellite receiver , the baseband digital signal processing including frame synchronization , deinterleaving , Viterbi decoding and descrambling four parts, aeronautical satellite system has multiple channels , different channels have different transmission characteristics and channel structure of this article for different channel characteristics proposed a variety of solutions , the text in detail elaborated the various parts of the design thinking and design methods using hardware description language are given FPGA implementation process and the simulation results for each module in the Quartus II development environment ; SOPC Builder development environment Nios II - based system design , including the Nios II embedded soft -core processors and all the required peripherals and interface module Nios II system hardware platform is implemented as a foundation for the development of system software . After field measurement , the design can achieve the desired goals . This design combines the flexibility of a high - speed processing capabilities of the FPGA and embedded processor , able to adapt to the rapid changes in protocol and performance requirements . The realization of the subject as the the Inmarsat aeronautical satellite system provides a physical layer raw data, with a good practical application value .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Radio equipment,telecommunications equipment > Receiver equipment, radio Radio > Receiver: the form of points
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