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SOPC Design and Realization of General Signal Generator Based on NiosII

Author: YuZhengNing
Tutor: YangXiaoHui
School: Changchun University of Science and Technology
Course: Physical Electronics
Keywords: NiosII SOPC DDS FPGA signal generator
CLC: TN47
Type: Master's thesis
Year: 2008
Downloads: 330
Quote: 6
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Abstract


The method of developing signal generator based on NiosII embedded processor is studied in this paper. Taking NiosII soft-core as a MCU, combining a signal generated module that is realized with FPGA chip’s resources build a system on programmable chip (SOPC) to realize a signal generator.This design includes two crucial modules: NiosII processor system and signal generated module.The NiosII processor system is equivalent to a microcontroller or“computer on a chip”that includes a CPU and a combination of peripherals and memory on a single chip. The term“NiosII processor system”refers to NiosII processor core, a set of on-chip peripherals, on-chip memory, and interfaces to off-chip memory (SDRAM and Flash) and off-chip peripherals. Some user defined peripherals (such as double port RAM, PWM, LCD, keyboard etc.) and their interfaces to Avalon Fabric Switch are designed, and the device drivers for the HAL are developed in C language.Signal generator module is composed of DDS module, modulation module and FIR low pass filter module.Most of the functions are completed on the FPGA, the outside auxiliary by DA transformation, enlargement and filter circuits then may realize the signal generator with the wideband, the high accuracy and restructure character.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > LSI,ultra LSI
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