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ULPI Interface USB IP core design and verification

Author: ZuoGuoZuo
Tutor: LiGuangJun
School: University of Electronic Science and Technology
Course: Information and Communication Engineering
Keywords: IP USB UTMI ULPI VIP
CLC: TN402
Type: Master's thesis
Year: 2008
Downloads: 197
Quote: 3
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Abstract

USB (Universal Serial Bus) has become a kind of mainstream interface technology and the industry-standard bus used the most widely in the field of Computer, Communication and Consumer Electronics. Meanwhile, SoC-based reuse methodology manual has been the mainstream technology in IC design field. The thesis introduces a design method of USB device IP core. What the thesis differs from other general theory research is that its design aims at developing a commercial reusable IP core considering the tradeoff among the key characteristics including the chip’s function, performance, area, speed, power and cost after integration other than just the implementation of the IP core function.In the thesis, the USB IP core complies with USB 2.0 specification, compatible USB 1.1 specification; supports UTMI (USB 2.0 Transceiver Macrocell Interface) 1.05 specification and ULPI (UTMI+ Low Pin Interface) 1.1 specification and supports AMBA (Advanced Microcontroller Bus Architecture) AHB (Advanced High-performance Bus) specification. The IP core communicates directly with USB 2.0 host through PHY with ULPI interfaces or UTMI interfaces and connects with ARM through AHB bus.The USB IP core in the thesis includes three modules: ULPI, SIE (Serial Interface Engine) and AHB modules. ULPI module is a wrapper from UTMI to ULPI. SIE module deals with the USB 2.0 link layer protocol. AHB module is to provide AHB bus with SoC design.In the thesis, the IP core completely complies with the design flow of reuse methodology manual. The IP core can be configurable to meet the requirements of many different designs; adopts industry-standard interfaces (such as ULPI, UTMI, AHB) complies to defensive design practices, whose code is readable, modifiable, and reusable; has complete set of deliverables. The USB IP core is a robust design, easy to be integrated to a whole chip design.The USB IP core in the thesis adopts the mainstream verification technologies and methods, including code lint checking, code review, module-level functional verification based on traditional verification method, system-level function verification based on VIP (Verification Intellectual Property) formal verification, static timing analysis and FPGA-based prototype verification. Those verification technologies and methods comply with reuse methodology manual and develop a robust USB IP core verification environment.In the thesis, the USB IP core which has good documentation, good code, thorough commenting, well-designed verification environments and suites and robust scripts complies with the requirement of reuse methodology manual. The USB IP core complies with the deliverable standard of reusable IP core, and has been delivered successfully.

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