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Design of Double Mode Active Power Factor Correction Controller ASIC

Author: CaoHui
Tutor: LaiXinQuan
School: Xi'an University of Electronic Science and Technology
Course: Circuits and Systems
Keywords: APFC AC-DC converter double mode BCD process
CLC: TM46
Type: Master's thesis
Year: 2006
Downloads: 40
Quote: 0
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Abstract


Recently it is recognized that Power Electronics has already become one of the most popular technology, which is paid more and more attention to.Characteristics of high efficiency, small size as well as simple configuration, the Switching Mode Power Supply (SMPS) based on this technology finds widespread application in more and more fields. Along with the constitution and recension of the harmonic standard by International Electrotechnical Commission (IEC) and State General Administration of the People’s Republic of China for Quality Supervision and Inspection and Quarantine (AQSIQ), the suppression of harmonic has been the key task of SMPS design. The most effective method of doing that is to introduce power factor correction technique.This dissertation is based on the scientific research consigned by XXX company, "The theoretical research and design of key techniques for AC/DC based on BCD process".A Double Mode Active Power Factor Correction Controller ASIC,named XD7915,is dealt with in detail in this paper, including the topology selection, the determination of system parameter, and the realization of system fuction as well as simulation results. The precept of Critical Conduction Boost Mode without multiplier which is used in the common circuits is employed in this chip, which minimizes the size of whole chip and the complication level of circuits. This chip can work on traditional constant output mode or’Follower Boost"mode.The’Follower Boost’mode can reduce the gap between the output and the input voltages to improve the boost efficiency. The work in this paper can be of significance for somewhat reference to similar ASIC.The design of XD7915 adopts the BCD process of UMC,which combinates the Bipolar, CMOS and DMOS.For the application of BCD process to IC design in our home country is not popular, the designers of PFC are also few, our study is an adventruous attempt. Now the pre-simulation of the chip has finished and the layout is in progress. The simulation results show that all the design specifications are met.The typical value of PF for power factor corrector application circuits is greater than 0.97. which takes on a perfect PF controlling performance.

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CLC: > Industrial Technology > Electrotechnical > Transformers, converters and reactors > Converter
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