Dissertation > Excellent graduate degree dissertation topics show

Study and Implementation of High Performance Parallel Hierarchy Stream Memory System

Author: DaiZeFu
Tutor: ZhangMinXuan
School: National University of Defense Science and Technology
Course: Electronic Science and Technology
Keywords: The Hierarchical Parallel flow storage systems Heterogeneous processor Shared secondary cache Data prefetching Stream programming model Scalability
CLC: TP333
Type: Master's thesis
Year: 2007
Downloads: 33
Quote: 0
Read: Download Dissertation


X64 is a stream processor designed and implemented a National Defense Science and Technology University , it remain flexible programmability while efforts to reduce the gap with fixed-function processor performance and effectiveness . The special data Localized X64 uses a VLIW and SIMD structure different from the vector processor , integrated media applications to meet the requirements of computing performance computing unit , at the same time using the the targeted three storage hierarchy , fully developed flow applications reduce off-chip memory bandwidth requirements . The test showed that , compared with the traditional programmable processor , the the X64 stream processor architecture has high computing performance and lower power consumption , high scalability . This thesis is based the X64 stream processor architecture , design and perfect the methods of storage system focuses on stream processors , the goal is to improve the efficiency of the storage system of the stream processor suitable for a broader range of applications such as scientific computing . Analysis of the strengths and weaknesses of the X64 tertiary storage hierarchy thesis demonstrates the necessity and feasibility of improved flow storage hierarchy . Streaming applications available parallelism and locality , we design and realize a shared secondary cache subsystem by heterogeneous processor and off-chip memory hierarchy to improve , improve the storage hierarchy . In order to ensure the correctness and reliability , we design and the level of integration of the various stages on convection storage system sufficiently validated . The paper also described in detail the method and process level parallel stream storage system performance evaluation and analysis of the design and efficiency , according to the results of the evaluation . In addition, the scalability of our convection storage systems were discussed , and the next higher memory access needs to think how to support the storage system . The research process , involving the design of storage systems in heterogeneous processor environments , the article describes the scalar processor and stream processors shared secondary cache subsystem structure has important reference value for future work .

Related Dissertations

  1. High-performance storage system is a key technology research,TP333
  2. Traffic Modeling and Simulation Research of Expressway Based on Cellular Automata,U491.112
  3. Research and Design of a High-Performance Scalable Public Key Cryptographic Coprocessor,TN918.1
  4. Research of Hybrid-3-field Scalable Video Coding,TN919.81
  5. BitTorrent system scalability study,TP393.09
  6. Scalability Software Architecture Research and Realization on .NET Platform,TP311.52
  7. New Generation Tower Simulator and Its Multilayered Synthetical Modeling Structure,TP391.9
  8. Research of Compressing of Picture Based on 3G Video Communication,TN911.73
  9. Research on Load Balancing and Cluster System,TP393
  10. H.323 protocol stack software performance optimization and improvement,TN916.2
  11. Research and Application of the Computer’s Clustering Technology,TP338
  12. Hierarchical scalable reliable multicast distributed multicast floor control,TN948.6
  13. Highly Extensible Embedded Environmental Monitoring System Based on Wireless Network,X84
  14. Multi-domain Trafc Engineering in Large Scale Transport Network,TN915.02
  15. Study on Efficient Video Coding Technology Based on MPEG-4,TN919.81
  16. Memory Access Optimization of ATLAS on Loongson 2F,TP332
  17. Fragment Processor a data cache design and optimization,TP332
  18. Application of Proteus in SCM Teaching,TP368.1-4
  19. Design and Implementation of Level One Cache Miss Pipelining on High Performance DSP,TP332
  20. Design and Implementation of High-throughput No-paper Lottery Transaction Processing System,TP311.52

CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Memory
© 2012 www.DissertationTopic.Net  Mobile