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All-optical half-duplex Gigabit Ethernet NIC hardware and software design

Author: WangLei
Tutor: HuangYuanQing
School: Xiamen University
Course: Measuring Technology and Instruments
Keywords: half-duplex Gigabit Ethernet Ethernet Network Interface Card NIC Driver
CLC: TP393
Type: Master's thesis
Year: 2002
Downloads: 321
Quote: 1
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Abstract

With the development of information technology,we have had powerful desktop computer. Applications of network multimedia and network computing especially in engineering and science become more and more. The need of network bandwidth is more urgent. These make the network technology get fast development. The Ethernet is a star of those networks.Since the Xerox make up the first experimental Ethernet in 1973,it had gone through the baptism of market and gotten the trust of many users. New standards are presented continuously,link media type is developing and the line speed is updating continuously. In 1998,the IEEE802.3z Gigabit Ethernet standard was ratified,it use fiber as it’s link media,line speed was upgraded up to 1,250 Mbps. It offers the users wide digital highway.The author believe that copper cable will be replaced by fiber as the development of network,but now most fiber LAN use a switch with fiber interface to get full-duplex operation,and the most important obstacle in deploying fiber LAN is the high price of the switch. Only some big company can afford the fiber switch and the switches often work in MAN.In order to lower the costs of Gigabit optical LAN,this paper presents a workgroup optical network base on passive star coupler (PSC). It use a PSC to replace the switch,and implement the CSMA/CD in the network interface card (NIC). When the throughput grows and transfer speed is raised,CSMA/CD will lower the network’s performance,but think about such truths below,the half-duplex Gigabit optic Ethernet will have some market space.First,there still exist large amount of small-size local network nowadays;but they require high transmit speed,such as studio,lab etc,especially multimedia,graph and image processing,virtual reality and advertising. Their transmissions are rarely simultaneous,but mainly paroxysmal.Second,network that based on this solution is convenient to be upgraded to full duplex. This NIC uses DP83820,which is developed by National Semiconductor of American,as the network control chip and could support both half duplex and full duplex just only to modify the software. Once switches prices descend to a acceptable level in the future,this network can be easily transited to full duplex network through replacing the star coupler with fiber switch,only need upgrading driver.Third,its low cost can push forward the spread of fiber networks. Current market value of 4X4 fiber switch is about 28,000 Yuan,and the 8 X 8 50,000 Yuan,but a 4 X 4 start coupling costs only 3000 Yuan,and 8X8 5000 Yuan. Its performance is far better than the same-price 100M switches which adopt Category 5 UTP. Network communications are developing rapidly in our country,deploying fiber network directly is convenient for users to upgrade their systems and even more benefit to protect users investments.Ethernet maps the two lowest layers of OSI model( Seven-layer Module):Data Link layer and physical layer and divides them to some function sublayers including PCS(Physical Coding Sublayer),PMA(Physical Medium Attachment) and PMD(Physical Medium Depend) in physical layer. In these sublayers,Logical Link Control(LLC) is implemented through operation system,NIC driver software and Medium Access Control(MAC) and the physical layer below it are implemented by the NIC.No half duplex Gigabit fiber NIC is sold in the market now. The main task of this paper is to design the hardware of half duplex Gigabit fiber NIC and develop its driver independently. This card largely depends on three integrate chips to fulfill its function:1) NIC control main chip,corresponding the MAC sublayer of Ethernet,to realize CSMA/CD media access protocol,manage the sending and receiving buffers integrated on the chip and provide motherboard PCI interface. 2)SERDES( SERializing and DESerializing)chip,corresponding PCS and PMA sublayers in Ethernet,mainly to complete 8B/10B coding and convert 10 bits parallel data to serial data,and convert them again at the receiving end. 3) fibre transceiver unit,completing light-electrical conver

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