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0.6μm CMOS 622Mb / s 4:1 multiplexer design
Author: ChenShouFu
Tutor: ZuoJianHua
School: Hefei University of Technology
Course: Circuits and Systems
Keywords: Optical fiber Multiplexer Synchronous Digital Hierarchy Trigger A source -coupled FET logic circuit
CLC: TN432
Type: Master's thesis
Year: 2005
Downloads: 65
Quote: 0
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Abstract
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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > Semiconductor integrated circuits ( solid state circuits ) > Field-effect type
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