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A low bit rate voice transmission hardware implementation

Author: ZuoYingWu
Tutor: ZhouZhengOu
School: University of Electronic Science and Technology
Course: Signal and Information Processing
Keywords: Voice Compression AMBE algorithm FPGA
CLC: TN912.3
Type: Master's thesis
Year: 2005
Downloads: 227
Quote: 1
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Abstract


With the rapid development of communication technology , frequency resources become more valuable . People have been committed compressed voice signal transmission channel bandwidth or reduce the transmission rate of the research work. On the current domestic voice compression studies, the voice rate in 4Kbps less, and has a good voice quality and intelligibility of almost nothing. In foreign countries, although progress on the voice compression algorithm is faster , but from a security guard to the satellite , aerospace and other applications using the actual system 2Kbps such a low bit rate communication less. Therefore, this paper realized 2Kbps low bit-rate transmission is designed to use with its value and meaning . It is in the wireless communications , IP telephony , secure communications and many other fields have important applications . Is the subject of this article complete with hardware design to achieve a voice compression codec system and on its basis to complete the application design time division duplex . The design uses a more advanced algorithms based on a dedicated AMBE voice codec compression chip , can be a number of voice compression rate selection , lowest compression rate can be as low as 2kbps. System sends the analog voice input terminal for A / D conversion , the resulting PCM signal compression coding by the main chip . Using FPGA control , complete the reset , the division and the encoded frame data to the system control header information, add the channel header, such as data processing and send temporary . In the receiving end the reverse process for the above process to recover the analog voice . This paper first introduces several typical speech coding algorithm, then introduce the system structure and principle , focusing on the use of the voice codec chip to use have been described , and finally , describes the FPGA control and data processing procedures design, simulation results, and the system's hardware and software debugging process and results.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Communicate > Electro-acoustic technology and speech signal processing > Speech Signal Processing
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