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Research on High-Speed IP Packet Capture Technology Based on Multi-core Architecture

Author: ZuoChengCheng
Tutor: ZhaoRongCai
School: PLA Information Engineering University
Course: Computer Software and Theory
Keywords: Packet capture Intrusion Detection Bloom filter Load balancing
CLC: TP393.08
Type: Master's thesis
Year: 2010
Downloads: 49
Quote: 1
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Abstract


Network intrusion detection system can automatically monitor network traffic to quickly detect malicious behavior , is widely used in the field of network security . However, with the rapid growth of the Internet backbone link rate , as the cornerstone of the intrusion detection system - packet capture performance has become increasingly difficult to keep up with the pace of development of the network bandwidth . In this paper, the intrusion detection system packet capture rate in the high - speed link , explore and study in reference to multi-core system platform , allows the system to high-speed links under the conditions above Gbit wire-speed packet processing key technologies and methods . Packet capture performance improvements can use dedicated hardware , software optimization can also be based on a common platform . Especially in recent years the popularity of multi-core CPU , such that substantially improve the performance through the parallel method becomes possible , Furthermore, the PCI bus is gradually being replaced by the new generation of PCI Express bus , which greatly enhances the performance and bandwidth of the bus , while maintaining the the software compatibility . The development of these structures technology gave high - speed intrusion detection system performance improvement brought new space . Traditional general-purpose PC platform - based software optimization mainly through zero-copy , mixed polling methods to improve the performance of packet capture parts , was also designed to improve packet capture rate did not consider how to play to the advantage of multi-core . In this paper, based on the the PCIe bus Intel x86 multi-core platform , research by software optimization Gbit and above link bandwidth packet capture key technologies . How to play the scale advantages of the multi-core to improve the performance of packet capture is the main problem addressed by this article . Therefore, the paper first constructed a model multicore - based IP packet capture network traffic broken down into multiple parallel processing in the implementation of nuclear . The second , Amitava Biswas DMA ring structure , the improvement of the Multi - DMA ring structure , and given the realization on the Intel PCIe Series card has been tested to achieve Gbit wire-speed ; designed and implemented a species the the AHH load balancing algorithm BAHH based on Bloom Filters AHH algorithm , reducing the stream remapping rate . Fourth , the introduction of Cache optimized concurrent lock-free queue , effectively improving the inter-core communication performance .

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Computer applications > Computer network > General issues > Computer Network Security
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