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Based on DSP and CPLD technology laser gyro SINS navigation system miniaturization CPU board development
Author: XuGaoYan
Tutor: JinShiLong;TangJianXun
School: National University of Defense Science and Technology
Course: Optical Science and Engineering
Keywords: Laser gyro Navigation CPU board Miniaturization DSP CPLD The phase demodulation Digital filtering
CLC: TN966
Type: Master's thesis
Year: 2005
Downloads: 610
Quote: 7
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Abstract
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Currently, based on laser gyro strapdown inertial navigation system is being more widely used , and in some tactical applications require inertial navigation system volume is very small , compact structure , which requires the inertial navigation system composed of an inertial measurement unit and signal processing circuits are miniaturized. Today's small size may be less than three-axis laser gyro Φ80 × 100mm, but the corresponding signal processing circuit size is relatively large, can not meet the application requirements miniaturization . Based on the needs of small applications designed based on DSP technology and CPLD technology used in laser gyro signal processing miniaturization CPU board . This design difficulty lies in the CPLD chip internal logic circuit design and DSP-based FIR low -pass digital filter design . This paper mainly studied : ( 1) how to implement the miniaturization of the signal processing circuit to produce a small signal processing CPU board , the size of 78 × 85mm ~ 2. ( 2 ) According to the principle of laser gyro signal processing , the CPLD chip design phase circuits , multiplier circuit , counting circuit and signal control circuitry. ( 3 ) Design of the CPLD and DSP timing match, counting and storage CPLD controlled separately , the external clock control counter , DSP instruction control counter Storage, DSP reads the data register before Xianxiang CPLD send signal to the DSP data read and CPLD clock data storage does not produce conflict , to solve the two functional modules that may arise between the timing mismatch. ( 4 ) programming and debugging of the DSP chip A / D conversion function , SCI serial communication functions and I / O port input and output functions . ( 5 ) in the DSP chip design and implementation of the entire low-pass digital filter coefficients of two mechanically dithered ring laser gyro output signal sampling and digital filtering , in addition to which Dithered signal and the high frequency noise. Test and test results show that the proposed design miniaturization CPU board running well , the realization of the right accelerometer signal count , the output signal of the laser gyro counts , phase demodulation and sampling filter ; realize A / D sampling as well as with PC transfer traffic. Meanwhile, the paper takes up a small part of the design of DSP resources for the subsequent development of a hardware basis .
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