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Research on Implement DES、AES and SMS4 Encryption Algorithm Efficiently on Reconfigurable Chip

Author: LiWenJun
Tutor: HangDeQuan
School: PLA Information Engineering University
Course: Communication and Information System
Keywords: Reconfigurable Computing Cryptographic chip AES SMS4 RDMS
CLC: TP309.7
Type: Master's thesis
Year: 2010
Downloads: 165
Quote: 0
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Abstract


Reconfigurable computing as a new computing model has been more and more widely used in ultra-high-precision arithmetic, encryption / decryption, biological engineering, neural networks, image processing and many other areas. This paper studies the password chip reconfigurable computing. The traditional password chip mostly the single algorithm chips by ASIC implementation, such a chip fast a chip can only implement an algorithm, once compromised system security threats. Reconfigurable cryptographic chip reconfigurable computing technology, the use of different cryptographic algorithms needed the flexibility to change the chip configuration. Compared with the special password chip ASIC implementation, reconfigurable cryptographic chip has a high flexibility and security, but its processing speed, there is a greater degree of decline. Reconfigurable cryptographic chip operation speed has become a \For reconfigurable cryptographic chip relative to the special password chip operation speed greater decline this article to design an efficient implementation of the DES, AES and SMS4 Algorithm reconfigurable architecture and propose an optimized reduce data transmission scheduling algorithm (RDMS algorithm). In the efficient reconfigurable cryptographic chip design, the use of RDMS algorithm, reconfigurable cryptographic chip to ensure the security and flexibility advantages, the computing speed is increased to close to ASIC implementation level. Which work as follows: 1. DES, AES and SMS4 algorithm-depth analysis of the study based on its hardware implementation unit Split, find out the same and similar operating unit group, from the scale and speed comprehensive consideration, to determine the design for a portion of the reconstruction unit, given the overall configuration of this three algorithms to achieve efficient, and reconfigurable design proved efficient and rationality. Depth study of reconfigurable computing hardware task scheduling problem, analysis of typical scheduling algorithm, find its shortcomings, combined with practical application, from a number of configuration files, hardware inter-task communication and resource utilization considering three proposed species to reduce the data transmission scheduling algorithm (of RDMS). The experimental results show that the algorithm is compared with two other similar algorithms can effectively reduce the number of configuration files, reducing the time of the communication between the hardware task configuration. Design efficient reconfigurable cryptographic chip use RDMS scheduling algorithm, experiments verify the performance of the reconfigurable cryptographic chip. The results show that the designed in this paper based on DES, AES and SMS4 algorithm reconfigurable cryptographic chip, the speed of operation close to the special password chip to realize the scale of resources than the ASIC design great decline. Compared with other similar design reconfigurable chips, in the case of the resource size chip throughput has improved greatly.

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > General issues > Security and confidentiality > Encryption and decryption
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