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Hardware Design and Implementation of High Speed Pipelined DHT for Helical Cone-Beam CT 3D Reconstruction

Author: WangJianNan
Tutor: ZhangYan
School: Harbin Institute of Technology
Course: Microelectronics and Solid State Electronics
Keywords: Spiral cone-beam CT Katsevich algorithm DHT FPGA
CLC: TP391.41
Type: Master's thesis
Year: 2010
Downloads: 38
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Abstract


With the emergence of multi-slice spiral CT (Computed Tomography) , medical CT is shift toward spiral cone-beam CT . Image obtained by helical cone beam scanning method reconstruction has the scanning speed, the advantages of high spatial resolution , but because of this imaging embodiment is more complicated in theory , the technical implementation also has considerable difficulty , particularly in the speed of implementation has been difficult break through the bottleneck , which hilbert filtering and back projection imaging constraints of real-time , two key steps . This article is a Hilbert filter section do exploratory research . Part of the system , as a three-dimensional reconstruction of spiral cone-beam CT (CBCT) FPGA hardware acceleration filtering part Katsevich exact reconstruction algorithm discrete Hilbert transform to achieve high-speed pipelined hardware structure . Explore this topic , the proposed high - speed hardware design method of discrete Hilbert transform , and successful implementation on an FPGA platform . This study mainly consists of the following three parts : First, in-depth study of the key steps in the algorithm imaging process , spiral cone-beam CT Katsevich , and Hilbert filter made ??their ways to accomplish this in-depth analysis and comparison of the select the method of Fourier transform discrete hilbert transform of reason . Second, expand the comparison of several fast Fourier transform algorithm , and ultimately proposed to use Winograd algorithm and the CORDIC algorithm pipeline DHT and specific method of in-depth discussions , the final completion of the work of the various parts of the design , functional simulation by . Finally , based on Xilinx Virtex-5 family XC5VLX50T FPGA devices ISE10.1 environment to achieve its hardware structure . Final simulation results Slice utilization rate of approximately 50% , the maximum operating frequency up to 200MHz , and the entire design by ML - 561 development board test . In this paper, the design of high-speed pipeline structure discrete Hilbert transform with greater practical significance , providing good conditions for real-time implementation for the future, the whole of the three - dimensional image reconstruction in spiral cone-beam CT , and have some real-time and cost advantage, have a good prospect .

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Computer applications > Information processing (information processing) > Pattern Recognition and devices > Image recognition device
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