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Research and design of the X - band frequency multiplier

Author: WangKai
Tutor: BaoJingFu
School: University of Electronic Science and Technology
Course: Circuits and Systems
Keywords: Frequency multiplier Filter Amplifier Harmonic suppression
CLC: TN771
Type: Master's thesis
Year: 2010
Downloads: 76
Quote: 0
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Abstract


With the vigorous development of the modern communications industry , the bandwidth required by the communication system is increasing. In the communication frequency congestion in the context of the development of millimeter-wave bands direction is a practical approach . As the core of the electronic system , the characteristics of the frequency source has direct impact on the performance of the entire system . Multiplier as a frequency synthesizer , not only to reduce the main vibration frequency of the electronic equipment , extend the working frequency band is also known for its high stability , low noise , simple structure , small size, easy to integrate the advantages favored . This thesis is based on the multiplier theory , design a 1 ~ 10GHz frequency signal source . Using two multiplier chain structure . The first stage uses a passive multiplier first input signal power amplifier to drive step recovery diodes fifth harmonic . The second stage utilizes the the active multiplier to the crystal field effect transistor gain second harmonic . A multiplier circuit has filter circuit to suppress unwanted fundamental and harmonic . Especially first band-pass filter circuit is novel compact structure design , and the relative bandwidth of less than 8% , in-band insertion loss and symmetrical adjustable transmission zeros , which can effectively suppress harmonics and reduce the circuit size. FET gate and drain of the power-on sequence design a power supply module , adjustable positive and negative voltage can be provided in accordance with the desired order , and can be applied for the same type of power on demand . First -class five - octave circuit contains amplifiers , power output greater than 0dBm input for 0 ~ 5dBm simulation , harmonic suppression greater than 30dBc . The second level of the active frequency multiplier simulation realized gain second harmonic . When the input is 0 ~ 5dBm output power greater than 5dBm, harmonic suppression greater than 25dBc . Doubler designed in this paper is simple and practical design thinking can be used to guide the development of monolithic microwave integrated frequency doubler circuit , and help to promote the development of modern communication system .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Multiplier, divider,inverter > Frequency multiplier
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