Dissertation > Excellent graduate degree dissertation topics show

Study of System-level Modeling Technology for Network-on-Chip Based Many-core Processor

Author: ZhuYuLong
Tutor: DuGaoMing
School: Hefei University of Technology
Course: Microelectronics and Solid State Electronics
Keywords: NoC Many-core System-level modeling SystemC
CLC: TN47
Type: Master's thesis
Year: 2012
Downloads: 26
Quote: 0
Read: Download Dissertation

Abstract


Multi-core or many-core architecture using Network on Chip (NoC)technology has the advantage of parallel computing and high throughoutcommunication performance. But at the same time it brings more complexity ofexploring the hardware and software design space. In order to get a betterunderstanding of system level design issues of NoC based many-core architecture,we first design the cycle accurate system-level models of NoC in both signal level(or called Register Transfer Level) and transactional level. And then we optimizethe modeling method to improve the simulation speed for the many-corearchitecture that can integrate hundreds of cores. Finally we developed a many-core simulator that integrates both of the NoC model and an ARM compatibleinstruction simulator. The main contribution of this paper is as follows：Firstly, we developed a cycle-accurate RTL level to explore the design spaceof an improved packet-connected circuit NoC. Through qualitative analysis, wethen proposed an optimizing method by reducing the module hierarchy levels,reconstructing the process relationship and virtualizing the switch architecture.Experiments with "Full" load show that the optimized RTL model has goodscalability and the simulation time is reduced by an average of48%than RTLmodel.Secondly, we developed a cycle-accurate transaction-level model to improveboth of the simulation efficiency and NoC performance. Implicit state machine andevent-driven are used to complete the routing node model, and automaticinterconnection algorithm is used to generate network automatically."Full" loadtest results show that the simulation time cost by transaction-level model isreduced by an average of53%than optimized RTL model.Finally, we implemented the many-core processor system-level simulationplatform integrated by ARM-SoC and NoC with the cycle acurate transaction levelmodeling technology. ARM instruction set model is packaged with SystemC asprocessor model. The master interface, resource network interface and DMA model are designed based on an open-source transaction-level AHB bus. The ARM-SoCsystem is composed of processor, master interface, AHB bus and other slavedevices. Then the MPSoC-NoC system-level simulation platform is integrated byARM-SoC and transaction-level NoC.The quantitative analysis of two programs onmatrix multiplicative shows that the platform can be easily used for design spaceexploration.

Related Dissertations

  1. Hydrothermal Synthesis of Oxide Hollow Spheres,TB383.4
  2. The Design and Optimization of Locomotive Signal Testing System Based on ARM9,U284.91
  3. Influence of Nitrate Concentrations on the Production of N2, N2O, NO, and CO2 by Soil Cores During Anaerobic Incubation,X131.3
  4. The Analysis of Anatomy and Biochemistry on Effects of Nitrogen on Appearance Quality of Rice Grain,S511
  5. Core-shell polymer microspheres synthesis, modification and application,O631.3
  6. The Research on the Enhancing Actual Effectiveness of the Socialist Core Value System Education of Vocational Students,G711
  7. Research and Design of Linked IPS for IPv6 Based on Multi-core Network Processor,TP393.04
  8. The Development Strategy of E Control Technology Company (China),F426.6
  9. The Design and FPGA Verification of Embedded UART Based on VHDL/FPGA,TN47
  10. Design and Implementation of Interface IP Core for CAN Bus Controller,TP273
  11. The Comprehensive Performance Evaluation and Application Research of the Core Enterprise in Green Supply Chain,F205;F224
  12. Chinese Auto Industry Supply Chain Management,F274
  13. Fabrication and Characterization of Nano-ZnO by PLA in Liquid Solution,TB383.1
  14. Study and Analysis of the Core Structure of Object Oriented Software,TP311.52
  15. The Preparation and Sensing Properties of the Fluorescent Chemosensing Material,TP212.2
  16. SOPC Design of Transient Power Quality Disturbances Detecting Based on Nios Ⅱ,TN47
  17. Research and Implementation of Data Parallel Programming Platform Based on Multi-Core,TP332
  18. Surface-enhanced Raman Spectroscopy Based Magnetic Separation and Immunoassay,R318.51
  19. The Research of Postal Delivery Networks Basing the Core Competitiveness Theory,F616.3
  20. The Study of the Core Competence in FX Company,F272.5
  21. Study on Cultivating the Core Competence of Modern Chinese Fast Food Industry,F719.3

CLC: > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > LSI,ultra LSI
© 2012 www.DissertationTopic.Net  Mobile