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Design and implementation of wideband digital channelized receiver

Author: ZhuYongJian
Tutor: ZhangRongJun; WangHong
School: Fudan University
Course: Electronics and Communication Engineering
Keywords: Digital Channelized Receiver Bandpass Sampling Polyphase FilterBank PCB Design FPGA
CLC: TN851
Type: Master's thesis
Year: 2012
Downloads: 123
Quote: 0
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Abstract


In electronic warfare systems, digital receivers are widely used because of parameter measurements of high precision, high flexibility and small size, and many other features. With the continuous development of radar technology, battlefield electromagnetic environment becoming increasingly complex, arrive at the same time signal increasing number of complex and changing signal types. Put forward higher requirements for the performance of the digital receiver. Broadband digital channelized receiver directly extract the signal from the frequency domain, to avoid the interference of the overlapping time-domain signal, intercepted a high probability of strong anti-interference ability, good frequency resolution and arrive at the same time signal processing capabilities. This makes it a hot spot of research institutions at home and abroadBased the actual needs of one practical project. The basic principles of the broadband digital channelized receiver is introduced in this thesis.Based on upper study deeply the efficient digital channelized architecture based polyphase filter banks to deduce and establish a mathematic model of the digital channelized receiver for real signal. The system simulation shows the validity of the model. And the structure of the broadband receiver has many features. Such as, low computational complexity and hardware to achieve efficient and accumulative computing error is small and effective solution to the contradiction between the high-speed signal acquisition and low-speed signal processing, to meet the electronic warfare receiver real-time requirements. Then the overall design concept of the broadband digital channelized receiver is described, the hardware components and circuit design of the prototype is described in detail, the final system design required to complete a channelized receiver FPGA algorithm design, given the pictures and testing of prototype in-kind results. The results show that the performance of the prototype frequency measurement accuracy, dynamic range, and at the same time signal capability achieved the desired design specifications to meet the actual needs of the projectThe technique discussed in this thesis has high value in practice, which will shorten the project’s R&D (research and development) period.

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