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Research on Wideband Radar Digital Receiver Data Processing Method

Author: WangYing
Tutor: ZhuZhiYu
School: Jiangsu University of Science and Technology
Course: Control Theory and Control Engineering
Keywords: Wideband radar Real-time processing DFT polyphase filter Slidingalgorithms
CLC: TN957.51
Type: Master's thesis
Year: 2012
Downloads: 60
Quote: 0
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Abstract


In the electronic battlefield, we faced with more and more serious electromagneticenvironment, the wider bandwidth and the more kinds of signal should be processed, andwhen the radar worked as a passive receiver in the context of the electronic war, the radarreceiver usually need a wide bandwidth and total probability signal interception and areal-time full-ability to process multi-signal processing, wideband radar is one of the trendsof radar development. However, in the bandwidth radar receiver system, the speed ofhigh-precision high-speed A/D sampling device has a big shortage to the real-timeprocessing ability of the processor existed. It limits the development of real-time dataprocessing.This paper focuses on the modern broadband digital signal receiving, at first analyzingof the model of digital receiver system. Aim at solving the low rate of the following digitalprocessing could not match with the converter rate of high-speed ADC at the front-end. Thepaper gives a brief introduction of the two data-rate conversion method, which band passsampling and digital down-conversion technology. Discussed Hilbert transform, polyphasefilter based on orthogonal transformation such as the number of possible digital downconversion architecture.Aim to the characteristics of the large bandwidth for wideband radar signal, using thesoftware radio in the digital channelized receiver concept, combined with the fast andefficient multi-phase filtering of FFT algorithm, providing a new direction for real-timedigital receiver for wideband radar data processing. On the other hand, use the zero-paddingsliding overlapping data processing algorithms to improve data processing efficiency. Tofurther enhance broadband access system throughput, systolic parallel structure designingfor FIR filter module and parallel FFT model replaced for DFT calculations, the simulationresults and its performance is analyzed. Finally, verifying the correctness and feasibility ofthis program by FPGA.

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Radar > Radar equipment,radar > Radar receiving equipment > Radar signal detection and processing
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