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Research on Key Technologies of face detection algorithm and chip

Author: ZhouZuoNa
Tutor: ZengXiaoYang
School: Fudan University
Course: Microelectronics and Solid State Electronics
Keywords: face detection memory scheme quick refresh of integral image 4-stagepipeline processing mode adjustable
CLC: TP391.41
Type: PhD thesis
Year: 2012
Downloads: 0
Quote: 2
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Abstract


With the rise of fields such as target monitoring, object tracking, human-computer interaction, statistics of people stream etc., face detection has not only been an important step of face recognition, but also become an independent technology being concerned by more and more people. It now has become indispensable in applications such as digital camera and human-computer interaction, the image communication of3G, the human tracking and alarm of security area. However, due to its huge computation, it is difficult to improve its speed and accuracy to satisfy the demand of many applications at the same time. And what’s more, to really play its important role in future and to be efficiently applied to different situations, the promotion of power consumption, cost and processing ability of face detection chip are worthy to be researched. Nevertheless, these are just difficult problems we now confront.The paper describes the research on the key technology of designing face detection chip with good performance, and puts forward some creative ideas in realizing face detection of high precision and speed from the side of algorithm improvement, architecture design and reconfiguration.In considering that the efficiency of the algorithm is one of the most important factors in detection, the paper analyses the most efficient face detection method based on AdaBoost algorithm in depth. And after introducing its training and detection procedure, the paper proposes an improved algorithm integrating variance preprocess and cascade structure, and adopts the image scaling method for hardware realizing, which could greatly decrease the access of memory. Five commonly used face databases in the world are summarized then, and are used to test the efficiency of improved face detection algorithm. And the paper also gives out the fixed-point bits of every data in the algorithm for the concrete design of face detection chip later.When considering the promotion of detection speed, and decrease of the power and area consumption, ideas of efficient memory scheme, quick refresh of integral image,4-stage pipeline processing method are proposed. The partition, architecture and the work order of each module are all researched in the paper. And they are also simulated, synthesized, validated and tested by corresponding tools. The results show that, the improvement of detection algorithm and creative chip design method are efficient, which makes the design have a relative less consumption of power and area compared to other advanced international designs, while maintaining a high precision and speed.As the reconfiguration of the face detection chip will directly affect the flexibility in applications of face detection technology in different situations and the development cost, the paper also brings forward a mode adjustable design method. It mainly makes use of four key factors greatly affecting on the detection capability. And by adjusting these four factors as input parameters, we finally realize the reconfiguration and enable the chip work in different modes.Face detection technology is a subject which is worthy to be researched continuously. It can bring with huge benefit to the society, and its research fruits can also provide meaningful reference to detection of other kinds of objects.

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CLC: > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Computer applications > Information processing (information processing) > Pattern Recognition and devices > Image recognition device
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