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Research on Optimization and Implementation of POWERLINK Time Synchronization Technology

Author: HeYuXiang
Tutor: LiuQuan
School: Wuhan University of Technology
Course: Communication and Information System
Keywords: Industrial Ethernet Powerlink time synchronization PTP
CLC: TP273
Type: Master's thesis
Year: 2013
Downloads: 23
Quote: 0
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Abstract


Recent years in the field of industrial control, because of the advantage of high real-time, high speed, low cost, a variety of industrial Ethernet technology gradually replaced the traditional Fieldbus technologies, Powerlink is one of the most widely used and quickly developed industrial Ethernet. In modern industrial control, centralized control is gradually replaced by the distributed control, in the centralized system, no clock problem need to be considered, but in the distributed control system, subsystems of the network need to work in an accurate, uniform time standard, if the clock deviation of each subsystems in the network is large, the communication performance will seriously be affected. Powerlink in industrial environment is usually used in distributed system, but its time synchronization technology is logic synchronization, can not achieve the high precision time synchronization. Therefore, I did some research on the Powerlink time synchronization technology, and designed an optimization proposal.This paper introduces the basic concept and the research situation of time synchronization technology, compares several typical time synchronization technologies, analyses the feasibility and limitations of the technology applied in Powerlink, and designs the general scheme of synchronization technique of Powerlink master-slave distributed architecture. After that, it researches the principle and communication mechanism of Powerlink, analyses the shortcomings of Powerlink time synchronization technology, finds out the key factors which affects the clock performance most, And puts forward an optimization scheme of time synchronization technology.This paper selects a hardware timestamp processor hardware calibration, offers accurate timestamps, and puts the exact time of feedback to the algorithm to eliminate jitter delay; it designs the synchronization algorithm for matching Powerlink communication standard, calculates the network transmission delay and master-slave node clock deviation from this, then the control node completes synchronization according to two numerical compensation’s clock. And it takes the scheme which puts algorithm into protocol data frames to complete the precise synchronization, without affecting the protocol standard and ensuring the normal communication at the same time.This paper constructs a Powerlink master-slave network platform successfully, including transplantation and configuration of Powerlink Windows in the PC system and the STM32F107VC development board, completes the synchronization algorithm in the protocol stack in programming, and designs a network synchronization precision test scheme, imports datas to Matalb drawing from Wireshark. The results show that the optimal mapping of Powerlink time synchronization accuracy is about900ns, compared to the time synchronization accuracy2600ns which is not optimized, test results show that the synchronization performance has greatly improved.

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CLC: > Industrial Technology > Automation technology,computer technology > Automation technology and equipment > Automation systems > Automatic control,automatic control system
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