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The Design of 16b 480uW 0.35um Audio Delta-Sigma ADC

Author: YiFeng
Tutor: WuXiaoBo；ZhaoMengLian
School: Zhejiang University
Course: Circuits and Systems
Keywords: Audio frequency △-ΣADC High-precision Low-power design
CLC: TN792
Type: Master's thesis
Year: 2010
Downloads: 149
Quote: 0
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Abstract


With the booming consumer electronics market , system - on - chip in the field of handheld audio devices and wireless communication has been widely used. Audio analog-to-digital converters attention as a bridge between the analog and digital signals , high precision and low - power design focus . The the dialysis audio Δ-ΣADC theory , current status , and trends , high precision and low power audio the Δ-ΣADC design program , and look forward to under in 500uW power consumption 16bit conversion accuracy . The design goals by comparison feedforward structure , the advantages and disadvantages of the feedback structure is selected from the angle of the low power consumption of the feedforward structure of a system configuration of the Δ-ΣADC . Feed forward structure , in order to further reduce power consumption , and a detailed analysis of the oversampling ratio, order of the system , quantization bits , and other system parameters , the structure proposed for low-power systems use . Through to use the MATLAB SIMULINK of Δ-ΣADC establish ideal analytical models to determine the timing of the system . By analyzing the thermal noise of the sampling capacitor in the non-ideality factor , the transfer function , the finite gain of the operational transconductance amplifier OTA , OTA finite gain-bandwidth product on the signal to establish the role of the error , the OTA finite conversion rate and the charge injection MOS switch , etc. the nonlinear factors for Δ-ΣADC properties , the design target reference value is given to the circuit module is designed to provide the basis , including the OTA , common mode feedback circuits, discrete comparator , a clock circuit , and small-gain feedback circuit . Circuit in TSMC CMOS 0.35um Mixed Signal process through the completion of the Cadence Virtuoso design . The Δ-ΣADC converted output digital signal, using the 8192-point FFT transform to obtain its frequency spectrum characteristics . The results showed that the maximum signal-to-noise ratio of 105dB, dynamic range of 106dB total power consumption of the system for 480uW . The quality factor of the system the FOM reached 4416μJ, to achieve the desired objectives .

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CLC: > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Digital circuits > Digital-analog , digital to analog conversion circuit
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